From 0629318372ab02b86b3285c7b631c4e1450402e5 Mon Sep 17 00:00:00 2001 From: roynatech2544 Date: Tue, 2 Nov 2021 19:09:33 +0900 Subject: [PATCH] universal7885: sepolicy: Address dual sim model's denials Change-Id: Ib9482de562b74964738968320c869c96e22bd704 Signed-off-by: roynatech2544 --- universal7885-common/sepolicy/vendor/property.te | 2 +- universal7885-common/sepolicy/vendor/property_contexts | 4 ++++ universal7885-common/sepolicy/vendor/rild.te | 2 ++ 3 files changed, 7 insertions(+), 1 deletion(-) diff --git a/universal7885-common/sepolicy/vendor/property.te b/universal7885-common/sepolicy/vendor/property.te index 2a4fc8e..b558ecd 100644 --- a/universal7885-common/sepolicy/vendor/property.te +++ b/universal7885-common/sepolicy/vendor/property.te @@ -19,7 +19,7 @@ type vendor_cbd_prop, property_type; type vendor_radio_prop, property_type; type vendor_fastcharge_prop, property_type; type vendor_wifi_prop, property_type; - +type rild_prop, property_type; # property.te type vendor_secureos_prop, property_type; type vendor_tzdaemon_prop, property_type; diff --git a/universal7885-common/sepolicy/vendor/property_contexts b/universal7885-common/sepolicy/vendor/property_contexts index dec4d3e..dca0076 100644 --- a/universal7885-common/sepolicy/vendor/property_contexts +++ b/universal7885-common/sepolicy/vendor/property_contexts @@ -52,6 +52,10 @@ vendor.wlan. u:object_r:vendor_wlan_prop:s0 # Hwc hwc.exynos.vsync_mode u:object_r:vendor_hwc_prop:s0 +# Rild +mdc.sys.enable_smff0 u:object_r:rild_prop:s0 +ro.csc.countryiso_code u:object_r:rild_prop:s0 +persist.sys.omc_etcpath u:object_r:rild_prop:s0 # TEEGRIS vendor.secureos. u:object_r:vendor_secureos_prop:s0 diff --git a/universal7885-common/sepolicy/vendor/rild.te b/universal7885-common/sepolicy/vendor/rild.te index c0b5540..5f51394 100644 --- a/universal7885-common/sepolicy/vendor/rild.te +++ b/universal7885-common/sepolicy/vendor/rild.te @@ -93,3 +93,5 @@ allow rild hal_audio_default:file r_file_perms; # hwservice add_hwservice(rild, rild_hwservice) + +get_prop(rild, rild_prop)