A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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Merge tag 'LA.UM.9.16.r1-13800-MANNAR.QSSI14.0' into android13-5.4-lahaina

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* commit 'bc81f40676':
  ARM: dts: msm: Enable sdx-ext-ipc for v1
  ARM: dts: msm: enable panel notifier support for eDP panel
  ARM: dts: msm: update gpio and pwm settings for eDP support
  ARM: dts: msm: Set Default mode none for USB2 yupik IOT
  ARM: dts: qcom: Add cooling cells property in all the CPU node for yupik
  ARM: dts: msm: ARM: dts: msm: Enable Secondary Controller for QCM6490 IOT
  ARM: dts: msm: add support for eDP on Yupik IOT HSP platform
  ARM: dts: msm: Adding ipa fw PIL timeout value
  ARM: dts: msm: Introduce flag to notify BME deassert IRQ support
  ARM: dts: msm: Fallback to 3 cluster approach for Katmai
  ARM: dts: msm: Add non-wake-svc node
  dt-bindings: msm: Add documentation for PME in d3cold wake flag
  ARM: dts: msm: Add support of FMAX 700mhz for blair GPU
  ARM: dts: qcom: Add new soc-id for Blair
  ARM: dts: msm: add rtl based flag
  ARM: dts: msm: Disable ipa from wlan side for blair apq
  ARM: dts: msm: disable IPA entry for blair APQ targets
  ARM: dts: qcom: Add apq variant device tree support to Blair

 Conflicts:
	arch/arm64/boot/dts/vendor/bindings/pci/msm_ep_pcie.txt

Change-Id: I910a65d415e3bedfc8f1e890a2ab262a9263bb94
This commit is contained in:
Michael Bestas 2024-01-04 18:35:27 +02:00
commit 080aaae37c
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GPG key ID: CC95044519BE6669
7 changed files with 115 additions and 0 deletions
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2
arch/arm64/boot/dts/vendor/bindings/pci/msm_ep_pcie.txt vendored
View file

@ -79,6 +79,8 @@ Optional Properties:
reboot/panic.
- qcom,pme-in-wake-from-d3cold: Issue PME message in device initiated wake
from d3cold.
- qcom,pcie-bme-deassert-irq: Enable BME deassert irq as part of aggregated irq
if it is supported by the target.
Example:

6
arch/arm64/boot/dts/vendor/qcom/katmai-cpu-fp2.dtsi vendored
View file

@ -39,6 +39,7 @@
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
next-level-cache = <&L2_1>;
#cooling-cells = <2>;
L2_1: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@ -56,6 +57,7 @@
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
next-level-cache = <&L2_2>;
#cooling-cells = <2>;
L2_2: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@ -73,6 +75,7 @@
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
next-level-cache = <&L2_3>;
#cooling-cells = <2>;
L2_3: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@ -108,6 +111,7 @@
dynamic-power-coefficient = <520>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
next-level-cache = <&L2_5>;
#cooling-cells = <2>;
L2_5: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@ -125,6 +129,7 @@
dynamic-power-coefficient = <520>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
next-level-cache = <&L2_6>;
#cooling-cells = <2>;
L2_6: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@ -142,6 +147,7 @@
dynamic-power-coefficient = <520>;
qcom,freq-domain = <&cpufreq_hw 2 4>;
next-level-cache = <&L2_7>;
#cooling-cells = <2>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;

5
arch/arm64/boot/dts/vendor/qcom/sdxlemur-mtp-mbb-pcie-ep-ipq.dts vendored
View file

@ -10,3 +10,8 @@
"qcom,sdxlemur", "qcom,mtp";
qcom,board-id = <0xB010008 0x20B>;
};
&sdx_ext_ipc {
ipq807x_attach = <1>;
status = "ok"
};

1
arch/arm64/boot/dts/vendor/qcom/sdxlemur.dtsi vendored
View file

@ -990,6 +990,7 @@
qcom,aoss-rst-clr;
qcom,aux-clk = <0x11>;
qcom,avoid-reboot-in-d3hot;
qcom,pcie-bme-deassert-irq;
qcom,phy-init = <0x1240 0x01 0x0
0x100c 0x02 0x0

83
arch/arm64/boot/dts/vendor/qcom/yupik-iot-hsp.dtsi vendored
View file

@ -4,6 +4,89 @@
&soc {
};
&sde_edp {
status = "disabled";
pinctrl-names = "mdss_dp_hpd_active", "mdss_dp_hpd_tlmm", "mdss_dp_hpd_ctrl",
"mdss_dp_active", "mdss_dp_sleep", "mdss_edp_bl_pwm";
pinctrl-0 = <&edp_hpd_ctrl>;
pinctrl-1 = <&edp_hpd_ctrl>;
pinctrl-2 = <&edp_hpd_ctrl>;
pinctrl-3 = <&edp_hpd_ctrl>;
pinctrl-4 = <&edp_hpd_ctrl>;
pinctrl-5 = <&pmic_edp_bl_pwm>;
qcom,dp-hpd-gpio = <&tlmm 60 0>;
qcom,edp-vcc-en-gpio = <&tlmm 80 0>;
//qcom,edp-backlight-pwr-gpio = <&tlmm 102 0>;
qcom,edp-pwm-en-gpio = <&pm8350c_gpios 8 0>;
qcom,edp-backlight-en-gpio = <&pm8350c_gpios 7 0>;
qcom,edp-default-panel = <&edp_panel_1080p_video>;
qcom,panel-notifier-support;
};
&mdss_mdp {
edp_panel_1080p_video: qcom,mdss_edp_panel_1080p_video {
status = "ok"
};
};
&tlmm {
edp_hpd_ctrl: hpd_ctrl@60 {
mux {
pins = "gpio60";
function = "edp_hot";
};
config {
pins = "gpio60";
bias-disable;
input-enable;
drive-strength = <2>;
};
};
};
&pm8350c_gpios {
pmic_edp_bl_en: pmic-edp-bl-en-state {
pins = "gpio7";
function = "normal";
bias-disable;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
/* Force backlight to be disabled to match state at boot. */
output-low;
};
pmic_edp_bl_pwm: pmic-edp-bl-pwm-state {
pins = "gpio8";
function = "func1";
bias-disable;
qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
/* Force backlight to be disabled to match state at boot. */
output-low;
};
};
&pm8350c_pwm_2 {
status = "ok"
};
&soc {
edp_panel_bl_reg: edp_panel_bl_reg {
compatible = "qcom,stub-regulator";
regulator-name = "edp_panel_bl_reg";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
pm8350c_pwm_backlight: backlight {
compatible = "pwm-backlight";
power-supply = <&edp_panel_bl_reg>;
enable-gpios = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_edp_bl_en>;
pwms = <&pm8350c_pwm_2 0 65535 0>;
};
};
&pcie0 {
status = "ok"
};

12
arch/arm64/boot/dts/vendor/qcom/yupik-iot.dtsi vendored
View file

@ -28,3 +28,15 @@
&gcc_usb30_sec_gdsc {
status = "ok"
};
&usb1 {
qcom,default-mode-none;
status = "ok"
dwc3@8c00000 {
snps,usb2-gadget-lpm-disable;
};
};
&usb2_phy1 {
status = "ok"
};

6
arch/arm64/boot/dts/vendor/qcom/yupik.dtsi vendored
View file

@ -101,6 +101,7 @@
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
next-level-cache = <&L2_1>;
#cooling-cells = <2>;
L2_1: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@ -118,6 +119,7 @@
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
next-level-cache = <&L2_2>;
#cooling-cells = <2>;
L2_2: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@ -135,6 +137,7 @@
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
next-level-cache = <&L2_3>;
#cooling-cells = <2>;
L2_3: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@ -170,6 +173,7 @@
dynamic-power-coefficient = <520>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
next-level-cache = <&L2_5>;
#cooling-cells = <2>;
L2_5: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@ -187,6 +191,7 @@
dynamic-power-coefficient = <520>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
next-level-cache = <&L2_6>;
#cooling-cells = <2>;
L2_6: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
@ -5274,6 +5279,7 @@
qcom,pas-id = <0xf>;
qcom,firmware-name = "yupik_ipa_fws";
qcom,pil-force-shutdown;
qcom,proxy-timeout-ms = <1000>;
memory-region = <&pil_ipa_gsi_mem>;
};