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dts/display: Modify 1st csot mipi clk = 450mHz

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Fix inconsistency in mipi clock frequency measurement and configuration

Change-Id: I84312d45d638fd051aff616258e6496237ace20d
Signed-off-by: tinno64 <tinno64@motorola.com>
Reviewed-on: https://gerrit.mot.com/2612060
SME-Granted: SME Approvals Granted
SLTApproved: Slta Waiver
Tested-by: Jira Key
Reviewed-by: Xiangpo Zhao <zhaoxp3@motorola.com>
Submit-Approved: Jira Key
This commit is contained in:
tinno64 2023-05-18 11:21:18 +08:00 • committed by panyq6
commit 08bc070d5e
1 changed files with 1 additions and 0 deletions
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1
qcom/bangkk-display.dtsi
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@ -240,6 +240,7 @@
qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0";
qcom,mdss-dsi-display-timings {
timing@0 {
qcom,mdss-dsi-panel-clockrate = <890000000>;
qcom,mdss-dsi-panel-phy-timings = [00 1E 08 07 18 22 08
08 08 02 04 00 1A 0D];
qcom,display-topology = <1 1 1>;