mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-09 05:39:54 -04:00
Merge "clk: qcom: gdsc-regulator: Remove polling logic when disabling GDSC HW CTL"
This commit is contained in:
qctecmdr
Gerrit - the friendly Code Review server
commit
0c4596a68b
1 changed files with 157 additions and 158 deletions
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@ -500,17 +500,11 @@ static int gdsc_set_mode(struct regulator_dev *rdev, unsigned int mode)
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/*
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* There may be a race with internal HW trigger signal,
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* that will result in GDSC going through a power down and
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* up cycle. If we poll too early, status bit will
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* indicate 'on' before the GDSC can finish the power cycle.
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* Account for this case by waiting 1us before polling.
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* up cycle. Account for this case by waiting 1us before
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* proceeding.
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*/
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gdsc_mb(sc);
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udelay(1);
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ret = poll_gdsc_status(sc, ENABLED);
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if (ret)
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dev_err(&rdev->dev, "%s set_mode timed out: 0x%x\n",
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sc->rdesc.name, regval);
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break;
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default:
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ret = -EINVAL;
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@ -542,129 +536,144 @@ static const struct regmap_config gdsc_regmap_config = {
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.fast_io = true,
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};
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static int gdsc_probe(struct platform_device *pdev)
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static int gdsc_parse_dt_data(struct gdsc *sc, struct device *dev,
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struct regulator_init_data **init_data)
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{
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static atomic_t gdsc_count = ATOMIC_INIT(-1);
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struct regulator_config reg_config = {};
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struct regulator_init_data *init_data;
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struct resource *res;
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struct gdsc *sc;
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uint32_t regval, clk_dis_wait_val = 0;
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bool support_hw_trigger;
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int i, ret;
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u32 timeout;
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int ret;
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sc = devm_kzalloc(&pdev->dev, sizeof(struct gdsc), GFP_KERNEL);
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if (sc == NULL)
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*init_data = of_get_regulator_init_data(dev, dev->of_node, &sc->rdesc);
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if (*init_data == NULL)
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return -ENOMEM;
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init_data = of_get_regulator_init_data(&pdev->dev, pdev->dev.of_node,
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&sc->rdesc);
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if (init_data == NULL)
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return -ENOMEM;
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if (of_get_property(dev->of_node, "parent-supply", NULL))
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(*init_data)->supply_regulator = "parent";
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if (of_get_property(pdev->dev.of_node, "parent-supply", NULL))
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init_data->supply_regulator = "parent";
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ret = of_property_read_string(pdev->dev.of_node, "regulator-name",
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&sc->rdesc.name);
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ret = of_property_read_string(dev->of_node, "regulator-name",
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&sc->rdesc.name);
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if (ret)
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return ret;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL) {
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dev_err(&pdev->dev, "Failed to get resources\n");
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return -EINVAL;
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}
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sc->gdscr = devm_ioremap(&pdev->dev, res->start, resource_size(res));
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if (sc->gdscr == NULL)
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return -ENOMEM;
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sc->regmap = devm_regmap_init_mmio(&pdev->dev, sc->gdscr,
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&gdsc_regmap_config);
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if (!sc->regmap) {
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dev_err(&pdev->dev, "Couldn't get regmap\n");
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return -EINVAL;
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}
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if (of_find_property(pdev->dev.of_node, "domain-addr", NULL)) {
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sc->domain_addr = syscon_regmap_lookup_by_phandle
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(pdev->dev.of_node, "domain-addr");
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if (of_find_property(dev->of_node, "domain-addr", NULL)) {
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sc->domain_addr = syscon_regmap_lookup_by_phandle(dev->of_node,
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"domain-addr");
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if (IS_ERR(sc->domain_addr))
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return -ENODEV;
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return PTR_ERR(sc->domain_addr);
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}
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if (of_find_property(pdev->dev.of_node, "sw-reset", NULL)) {
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sc->sw_reset = syscon_regmap_lookup_by_phandle
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(pdev->dev.of_node, "sw-reset");
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if (of_find_property(dev->of_node, "sw-reset", NULL)) {
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sc->sw_reset = syscon_regmap_lookup_by_phandle(dev->of_node,
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"sw-reset");
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if (IS_ERR(sc->sw_reset))
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return -ENODEV;
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return PTR_ERR(sc->sw_reset);
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}
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if (of_find_property(pdev->dev.of_node, "hw-ctrl-addr", NULL)) {
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sc->hw_ctrl = syscon_regmap_lookup_by_phandle(
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pdev->dev.of_node, "hw-ctrl-addr");
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if (of_find_property(dev->of_node, "hw-ctrl-addr", NULL)) {
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sc->hw_ctrl = syscon_regmap_lookup_by_phandle(dev->of_node,
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"hw-ctrl-addr");
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if (IS_ERR(sc->hw_ctrl))
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return -ENODEV;
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return PTR_ERR(sc->hw_ctrl);
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}
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sc->gds_timeout = TIMEOUT_US;
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of_property_read_u32(dev->of_node, "qcom,gds-timeout",
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&sc->gds_timeout);
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ret = of_property_read_u32(pdev->dev.of_node, "qcom,gds-timeout",
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&timeout);
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if (!ret)
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sc->gds_timeout = timeout;
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sc->clock_count = of_property_count_strings(pdev->dev.of_node,
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"clock-names");
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sc->clock_count = of_property_count_strings(dev->of_node,
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"clock-names");
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if (sc->clock_count == -EINVAL) {
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sc->clock_count = 0;
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} else if (sc->clock_count < 0) {
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dev_err(&pdev->dev, "Failed to get clock names\n");
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dev_err(dev, "Failed to get clock names, ret=%d\n",
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sc->clock_count);
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return sc->clock_count;
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}
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sc->root_en = of_property_read_bool(dev->of_node,
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"qcom,enable-root-clk");
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sc->force_root_en = of_property_read_bool(dev->of_node,
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"qcom,force-enable-root-clk");
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sc->reset_aon = of_property_read_bool(dev->of_node,
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"qcom,reset-aon-logic");
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sc->no_status_check_on_disable = of_property_read_bool(dev->of_node,
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"qcom,no-status-check-on-disable");
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sc->retain_ff_enable = of_property_read_bool(dev->of_node,
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"qcom,retain-regs");
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sc->toggle_logic = !of_property_read_bool(dev->of_node,
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"qcom,skip-logic-collapse");
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if (!sc->toggle_logic) {
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sc->reset_count = of_property_count_strings(dev->of_node,
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"reset-names");
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if (sc->reset_count == -EINVAL) {
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sc->reset_count = 0;
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} else if (sc->reset_count < 0) {
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dev_err(dev, "Failed to get reset clock names\n");
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return sc->reset_count;
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}
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}
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if (of_find_property(dev->of_node, "qcom,support-hw-trigger", NULL)) {
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(*init_data)->constraints.valid_ops_mask |=
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REGULATOR_CHANGE_MODE;
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(*init_data)->constraints.valid_modes_mask |=
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REGULATOR_MODE_NORMAL | REGULATOR_MODE_FAST;
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}
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return 0;
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}
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static int gdsc_get_resources(struct gdsc *sc, struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct resource *res;
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int ret, i;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (res == NULL) {
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dev_err(dev, "Failed to get address resource\n");
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return -EINVAL;
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}
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sc->clocks = devm_kzalloc(&pdev->dev,
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sizeof(struct clk *) * sc->clock_count, GFP_KERNEL);
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if (!sc->clocks)
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sc->gdscr = devm_ioremap(dev, res->start, resource_size(res));
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if (sc->gdscr == NULL)
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return -ENOMEM;
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sc->root_clk_idx = -1;
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sc->regmap = devm_regmap_init_mmio(dev, sc->gdscr, &gdsc_regmap_config);
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if (!sc->regmap) {
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dev_err(dev, "Couldn't get regmap\n");
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return -EINVAL;
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}
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sc->root_en = of_property_read_bool(pdev->dev.of_node,
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"qcom,enable-root-clk");
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sc->force_root_en = of_property_read_bool(pdev->dev.of_node,
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"qcom,force-enable-root-clk");
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if (of_find_property(pdev->dev.of_node, "vdd_parent-supply", NULL)) {
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sc->parent_regulator = devm_regulator_get(&pdev->dev,
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"vdd_parent");
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if (of_find_property(dev->of_node, "vdd_parent-supply", NULL)) {
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sc->parent_regulator = devm_regulator_get(dev, "vdd_parent");
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if (IS_ERR(sc->parent_regulator)) {
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ret = PTR_ERR(sc->parent_regulator);
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if (ret != -EPROBE_DEFER)
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dev_err(&pdev->dev,
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"Unable to get vdd_parent regulator, err: %d\n",
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dev_err(dev, "Unable to get vdd_parent regulator, ret=%d\n",
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ret);
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return ret;
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}
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}
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sc->clocks = devm_kcalloc(dev, sc->clock_count, sizeof(*sc->clocks),
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GFP_KERNEL);
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if (sc->clock_count && !sc->clocks)
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return -ENOMEM;
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sc->root_clk_idx = -1;
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for (i = 0; i < sc->clock_count; i++) {
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const char *clock_name;
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of_property_read_string_index(pdev->dev.of_node, "clock-names",
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i, &clock_name);
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of_property_read_string_index(dev->of_node, "clock-names", i,
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&clock_name);
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sc->clocks[i] = devm_clk_get(&pdev->dev, clock_name);
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sc->clocks[i] = devm_clk_get(dev, clock_name);
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if (IS_ERR(sc->clocks[i])) {
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int rc = PTR_ERR(sc->clocks[i]);
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if (rc != -EPROBE_DEFER)
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dev_err(&pdev->dev, "Failed to get %s\n",
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clock_name);
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return rc;
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ret = PTR_ERR(sc->clocks[i]);
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if (ret != -EPROBE_DEFER)
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dev_err(dev, "Failed to get %s, ret=%d\n",
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clock_name, ret);
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return ret;
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}
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if (!strcmp(clock_name, "core_root_clk"))
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@ -672,18 +681,57 @@ static int gdsc_probe(struct platform_device *pdev)
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}
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if ((sc->root_en || sc->force_root_en) && (sc->root_clk_idx == -1)) {
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dev_err(&pdev->dev, "Failed to get root clock name\n");
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dev_err(dev, "Failed to get root clock name\n");
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return -EINVAL;
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}
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sc->reset_aon = of_property_read_bool(pdev->dev.of_node,
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"qcom,reset-aon-logic");
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if (!sc->toggle_logic) {
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sc->reset_clocks = devm_kcalloc(&pdev->dev, sc->reset_count,
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sizeof(*sc->reset_clocks),
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GFP_KERNEL);
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if (sc->reset_count && !sc->reset_clocks)
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return -ENOMEM;
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sc->rdesc.id = atomic_inc_return(&gdsc_count);
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sc->rdesc.ops = &gdsc_ops;
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sc->rdesc.type = REGULATOR_VOLTAGE;
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sc->rdesc.owner = THIS_MODULE;
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platform_set_drvdata(pdev, sc);
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for (i = 0; i < sc->reset_count; i++) {
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const char *reset_name;
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of_property_read_string_index(pdev->dev.of_node,
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"reset-names", i, &reset_name);
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sc->reset_clocks[i] = devm_reset_control_get(&pdev->dev,
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reset_name);
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if (IS_ERR(sc->reset_clocks[i])) {
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ret = PTR_ERR(sc->reset_clocks[i]);
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if (ret != -EPROBE_DEFER)
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dev_err(&pdev->dev, "Failed to get %s, ret=%d\n",
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reset_name, ret);
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return ret;
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}
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}
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}
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return 0;
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}
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static int gdsc_probe(struct platform_device *pdev)
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{
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static atomic_t gdsc_count = ATOMIC_INIT(-1);
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struct regulator_config reg_config = {};
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struct regulator_init_data *init_data = NULL;
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struct gdsc *sc;
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uint32_t regval, clk_dis_wait_val = 0;
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int ret;
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sc = devm_kzalloc(&pdev->dev, sizeof(*sc), GFP_KERNEL);
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if (sc == NULL)
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return -ENOMEM;
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ret = gdsc_parse_dt_data(sc, &pdev->dev, &init_data);
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if (ret)
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return ret;
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ret = gdsc_get_resources(sc, pdev);
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if (ret)
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return ret;
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/*
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* Disable HW trigger: collapse/restore occur based on registers writes.
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@ -703,54 +751,7 @@ static int gdsc_probe(struct platform_device *pdev)
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regmap_write(sc->regmap, REG_OFFSET, regval);
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sc->no_status_check_on_disable =
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of_property_read_bool(pdev->dev.of_node,
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"qcom,no-status-check-on-disable");
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sc->retain_ff_enable = of_property_read_bool(pdev->dev.of_node,
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"qcom,retain-regs");
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sc->toggle_logic = !of_property_read_bool(pdev->dev.of_node,
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"qcom,skip-logic-collapse");
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support_hw_trigger = of_property_read_bool(pdev->dev.of_node,
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"qcom,support-hw-trigger");
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if (support_hw_trigger) {
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init_data->constraints.valid_ops_mask |= REGULATOR_CHANGE_MODE;
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init_data->constraints.valid_modes_mask |=
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REGULATOR_MODE_NORMAL | REGULATOR_MODE_FAST;
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}
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if (!sc->toggle_logic) {
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sc->reset_count = of_property_count_strings(pdev->dev.of_node,
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"reset-names");
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if (sc->reset_count == -EINVAL) {
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sc->reset_count = 0;
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} else if (sc->reset_count < 0) {
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dev_err(&pdev->dev, "Failed to get reset clock names\n");
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return -EINVAL;
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}
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sc->reset_clocks = devm_kzalloc(&pdev->dev,
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sizeof(struct reset_control *) * sc->reset_count,
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GFP_KERNEL);
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if (!sc->reset_clocks)
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return -ENOMEM;
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for (i = 0; i < sc->reset_count; i++) {
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const char *reset_name;
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of_property_read_string_index(pdev->dev.of_node,
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"reset-names", i, &reset_name);
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sc->reset_clocks[i] = devm_reset_control_get(&pdev->dev,
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reset_name);
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if (IS_ERR(sc->reset_clocks[i])) {
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int rc = PTR_ERR(sc->reset_clocks[i]);
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if (rc != -EPROBE_DEFER)
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dev_err(&pdev->dev, "Failed to get %s\n",
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reset_name);
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return rc;
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}
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}
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regval &= ~SW_COLLAPSE_MASK;
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regmap_write(sc->regmap, REG_OFFSET, regval);
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@ -762,27 +763,26 @@ static int gdsc_probe(struct platform_device *pdev)
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}
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}
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sc->rdesc.id = atomic_inc_return(&gdsc_count);
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sc->rdesc.ops = &gdsc_ops;
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sc->rdesc.type = REGULATOR_VOLTAGE;
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sc->rdesc.owner = THIS_MODULE;
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reg_config.dev = &pdev->dev;
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reg_config.init_data = init_data;
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reg_config.driver_data = sc;
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reg_config.of_node = pdev->dev.of_node;
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reg_config.regmap = sc->regmap;
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sc->rdev = regulator_register(&sc->rdesc, ®_config);
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sc->rdev = devm_regulator_register(&pdev->dev, &sc->rdesc, ®_config);
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if (IS_ERR(sc->rdev)) {
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dev_err(&pdev->dev, "regulator_register(\"%s\") failed.\n",
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sc->rdesc.name);
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return PTR_ERR(sc->rdev);
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ret = PTR_ERR(sc->rdev);
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dev_err(&pdev->dev, "regulator_register(\"%s\") failed, ret=%d\n",
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sc->rdesc.name, ret);
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return ret;
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}
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return 0;
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}
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static int gdsc_remove(struct platform_device *pdev)
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{
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struct gdsc *sc = platform_get_drvdata(pdev);
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regulator_unregister(sc->rdev);
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platform_set_drvdata(pdev, sc);
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return 0;
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}
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@ -794,7 +794,6 @@ static const struct of_device_id gdsc_match_table[] = {
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static struct platform_driver gdsc_driver = {
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.probe = gdsc_probe,
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.remove = gdsc_remove,
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.driver = {
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.name = "gdsc",
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.of_match_table = gdsc_match_table,
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