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ARM: dts: msm: Vote for DDR BW for MPSS PIL on Lahaina

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It is possible that the DDR bandwidth requirements are not
met during modem SSR. Hence, explicitly vote for DDR turbo
frequency during modem PIL.

Change-Id: I5134feaf593673beb8bbdafc416814a5d41fb47b
This commit is contained in:
Raghavendra Rao Ananta 2020-09-24 12:29:13 -07:00
commit 0ca570d487
1 changed files with 2 additions and 0 deletions
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2
qcom/lahaina.dtsi
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@ -4425,6 +4425,8 @@
qcom,vdd_mss-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
qcom,proxy-reg-names = "vdd_cx", "vdd_mss";
interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>;
qcom,firmware-name = "modem";
memory-region = <&pil_modem_mem>;
qcom,proxy-timeout-ms = <10000>;