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Filename Latest commit message Latest commit date
Raghavendra Rao Ananta 0ca570d487 ARM: dts: msm: Vote for DDR BW for MPSS PIL on Lahaina
It is possible that the DDR bandwidth requirements are not
met during modem SSR. Hence, explicitly vote for DDR turbo
frequency during modem PIL.

Change-Id: I5134feaf593673beb8bbdafc416814a5d41fb47b
2020-09-30 14:51:38 -07:00
bindings Merge "ARM: dts: msm: Add cnss-enable-self-recovery flag for lahaina" 2020-09-29 10:33:05 -07:00
qcom ARM: dts: msm: Vote for DDR BW for MPSS PIL on Lahaina 2020-09-30 14:51:38 -07:00
Makefile ARM: dts: vendor: Add an initial Makefile to the vendor 2019-06-04 16:50:48 -07:00