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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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PM / devfreq: bw_hwmon: Add support for BWMON5 monitors
Add support for the fifth type of bandwidth monitor. This monitor is similar to the other types of monitors, but the register offset is slightly different, and it doesn't have a global interrupt base. Change-Id: Ib05602832b6d4712b783ebaaa5aae9e60c00e30b Signed-off-by: Stephen Boyd <[email protected]> [[email protected]: made minor styling changes] Signed-off-by: Amir Vajid <[email protected]>
This commit is contained in:
Stephen Boyd
Amir Vajid
parent
77d4c0bb9c
commit
0dd9e33079
1 changed files with 269 additions and 65 deletions
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@ -24,8 +24,12 @@
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#define GLB_INT_CLR(m) ((m)->global_base + 0x108)
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#define GLB_INT_EN(m) ((m)->global_base + 0x10C)
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#define MON_INT_STATUS(m) ((m)->base + 0x100)
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#define MON_INT_STATUS_MASK 0x03
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#define MON2_INT_STATUS_MASK 0xF0
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#define MON2_INT_STATUS_SHIFT 4
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#define MON_INT_CLR(m) ((m)->base + 0x108)
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#define MON_INT_EN(m) ((m)->base + 0x10C)
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#define MON_INT_ENABLE 0x1
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#define MON_EN(m) ((m)->base + 0x280)
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#define MON_CLEAR(m) ((m)->base + 0x284)
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#define MON_CNT(m) ((m)->base + 0x288)
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@ -46,9 +50,27 @@
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#define MON2_ZONE_CNT(m) ((m)->base + 0x2D8)
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#define MON2_ZONE_MAX(m, zone) ((m)->base + 0x2E0 + 0x4 * zone)
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#define MON3_INT_STATUS(m) ((m)->base + 0x00)
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#define MON3_INT_CLR(m) ((m)->base + 0x08)
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#define MON3_INT_EN(m) ((m)->base + 0x0C)
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#define MON3_INT_STATUS_MASK 0x0F
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#define MON3_EN(m) ((m)->base + 0x10)
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#define MON3_CLEAR(m) ((m)->base + 0x14)
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#define MON3_SW(m) ((m)->base + 0x20)
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#define MON3_THRES_HI(m) ((m)->base + 0x24)
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#define MON3_THRES_MED(m) ((m)->base + 0x28)
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#define MON3_THRES_LO(m) ((m)->base + 0x2C)
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#define MON3_ZONE_ACTIONS(m) ((m)->base + 0x30)
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#define MON3_ZONE_CNT_THRES(m) ((m)->base + 0x34)
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#define MON3_BYTE_CNT(m) ((m)->base + 0x38)
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#define MON3_WIN_TIMER(m) ((m)->base + 0x3C)
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#define MON3_ZONE_CNT(m) ((m)->base + 0x40)
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#define MON3_ZONE_MAX(m, zone) ((m)->base + 0x44 + 0x4 * zone)
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enum mon_reg_type {
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MON1,
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MON2,
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MON3,
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};
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struct bwmon_spec {
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@ -56,6 +78,8 @@ struct bwmon_spec {
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bool overflow;
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bool throt_adj;
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bool hw_sampling;
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bool has_global_base;
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enum mon_reg_type reg_type;
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};
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struct bwmon {
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@ -77,9 +101,6 @@ struct bwmon {
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#define ENABLE_MASK BIT(0)
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#define THROTTLE_MASK 0x1F
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#define THROTTLE_SHIFT 16
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#define INT_ENABLE_V1 0x1
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#define INT_STATUS_MASK 0x03
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#define INT_STATUS_MASK_HWS 0xF0
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static DEFINE_SPINLOCK(glb_lock);
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@ -92,6 +113,9 @@ static __always_inline void mon_enable(struct bwmon *m, enum mon_reg_type type)
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case MON2:
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writel_relaxed(ENABLE_MASK | m->throttle_adj, MON2_EN(m));
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break;
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case MON3:
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writel_relaxed(ENABLE_MASK | m->throttle_adj, MON3_EN(m));
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break;
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}
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}
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@ -104,6 +128,9 @@ static __always_inline void mon_disable(struct bwmon *m, enum mon_reg_type type)
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case MON2:
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writel_relaxed(m->throttle_adj, MON2_EN(m));
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break;
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case MON3:
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writel_relaxed(m->throttle_adj, MON3_EN(m));
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break;
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}
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/*
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* mon_disable() and mon_irq_clear(),
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@ -128,6 +155,12 @@ void mon_clear(struct bwmon *m, bool clear_all, enum mon_reg_type type)
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else
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writel_relaxed(MON_CLEAR_BIT, MON2_CLEAR(m));
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break;
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case MON3:
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if (clear_all)
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writel_relaxed(MON_CLEAR_ALL_BIT, MON3_CLEAR(m));
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else
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writel_relaxed(MON_CLEAR_BIT, MON3_CLEAR(m));
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break;
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}
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/*
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* The counter clear and IRQ clear bits are not in the same 4KB
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@ -138,7 +171,9 @@ void mon_clear(struct bwmon *m, bool clear_all, enum mon_reg_type type)
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}
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#define SAMPLE_WIN_LIM 0xFFFFF
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static void mon_set_hw_sampling_window(struct bwmon *m, unsigned int sample_ms)
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static __always_inline
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void mon_set_hw_sampling_window(struct bwmon *m, unsigned int sample_ms,
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enum mon_reg_type type)
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{
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u32 rate;
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@ -150,7 +185,17 @@ static void mon_set_hw_sampling_window(struct bwmon *m, unsigned int sample_ms)
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pr_warn("Sample window %u larger than hw limit: %u\n",
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rate, SAMPLE_WIN_LIM);
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}
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writel_relaxed(rate, MON2_SW(m));
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switch (type) {
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case MON1:
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WARN(1, "Invalid\n");
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return;
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case MON2:
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writel_relaxed(rate, MON2_SW(m));
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break;
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case MON3:
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writel_relaxed(rate, MON3_SW(m));
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break;
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}
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}
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}
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@ -173,15 +218,20 @@ void mon_irq_enable(struct bwmon *m, enum mon_reg_type type)
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case MON1:
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mon_glb_irq_enable(m);
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val = readl_relaxed(MON_INT_EN(m));
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val |= INT_ENABLE_V1;
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val |= MON_INT_ENABLE;
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writel_relaxed(val, MON_INT_EN(m));
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break;
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case MON2:
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mon_glb_irq_enable(m);
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val = readl_relaxed(MON_INT_EN(m));
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val |= INT_STATUS_MASK_HWS;
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val |= MON2_INT_STATUS_MASK;
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writel_relaxed(val, MON_INT_EN(m));
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break;
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case MON3:
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val = readl_relaxed(MON3_INT_EN(m));
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val |= MON3_INT_STATUS_MASK;
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writel_relaxed(val, MON3_INT_EN(m));
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break;
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}
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spin_unlock(&glb_lock);
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/*
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@ -211,15 +261,20 @@ void mon_irq_disable(struct bwmon *m, enum mon_reg_type type)
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case MON1:
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mon_glb_irq_disable(m);
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val = readl_relaxed(MON_INT_EN(m));
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val &= ~INT_ENABLE_V1;
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val &= ~MON_INT_ENABLE;
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writel_relaxed(val, MON_INT_EN(m));
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break;
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case MON2:
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mon_glb_irq_disable(m);
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val = readl_relaxed(MON_INT_EN(m));
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val &= ~INT_STATUS_MASK_HWS;
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val &= ~MON2_INT_STATUS_MASK;
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writel_relaxed(val, MON_INT_EN(m));
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break;
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case MON3:
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val = readl_relaxed(MON3_INT_EN(m));
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val &= ~MON3_INT_STATUS_MASK;
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writel_relaxed(val, MON3_INT_EN(m));
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break;
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}
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spin_unlock(&glb_lock);
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/*
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@ -239,13 +294,19 @@ unsigned int mon_irq_status(struct bwmon *m, enum mon_reg_type type)
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mval = readl_relaxed(MON_INT_STATUS(m));
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dev_dbg(m->dev, "IRQ status p:%x, g:%x\n", mval,
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readl_relaxed(GLB_INT_STATUS(m)));
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mval &= INT_STATUS_MASK;
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mval &= MON_INT_STATUS_MASK;
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break;
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case MON2:
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mval = readl_relaxed(MON_INT_STATUS(m));
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dev_dbg(m->dev, "IRQ status p:%x, g:%x\n", mval,
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readl_relaxed(GLB_INT_STATUS(m)));
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mval &= INT_STATUS_MASK_HWS;
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mval &= MON2_INT_STATUS_MASK;
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mval >>= MON2_INT_STATUS_SHIFT;
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break;
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case MON3:
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mval = readl_relaxed(MON3_INT_STATUS(m));
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dev_dbg(m->dev, "IRQ status p:%x\n", mval);
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mval &= MON3_INT_STATUS_MASK;
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break;
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}
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@ -279,13 +340,16 @@ void mon_irq_clear(struct bwmon *m, enum mon_reg_type type)
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{
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switch (type) {
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case MON1:
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writel_relaxed(INT_STATUS_MASK, MON_INT_CLR(m));
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writel_relaxed(MON_INT_STATUS_MASK, MON_INT_CLR(m));
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mon_glb_irq_clear(m);
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break;
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case MON2:
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writel_relaxed(INT_STATUS_MASK_HWS, MON_INT_CLR(m));
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writel_relaxed(MON2_INT_STATUS_MASK, MON_INT_CLR(m));
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mon_glb_irq_clear(m);
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break;
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case MON3:
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writel_relaxed(MON3_INT_STATUS_MASK, MON3_INT_CLR(m));
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break;
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}
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}
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@ -357,10 +421,13 @@ static unsigned int mbps_to_mb(unsigned long mbps, unsigned int ms)
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* Zone 3: byte count > THRES_HI
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*/
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#define THRES_LIM 0x7FFU
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static void set_zone_thres(struct bwmon *m, unsigned int sample_ms)
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static __always_inline
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void set_zone_thres(struct bwmon *m, unsigned int sample_ms,
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enum mon_reg_type type)
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{
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struct bw_hwmon *hw = &(m->hw);
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struct bw_hwmon *hw = &m->hw;
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u32 hi, med, lo;
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u32 zone_cnt_thres = calc_zone_counts(hw);
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hi = mbps_to_mb(hw->up_wake_mbps, sample_ms);
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med = mbps_to_mb(hw->down_wake_mbps, sample_ms);
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@ -374,23 +441,36 @@ static void set_zone_thres(struct bwmon *m, unsigned int sample_ms)
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lo = min(lo, med-1);
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}
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writel_relaxed(hi, MON2_THRES_HI(m));
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writel_relaxed(med, MON2_THRES_MED(m));
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writel_relaxed(lo, MON2_THRES_LO(m));
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switch (type) {
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case MON1:
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WARN(1, "Invalid\n");
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return;
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case MON2:
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writel_relaxed(hi, MON2_THRES_HI(m));
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writel_relaxed(med, MON2_THRES_MED(m));
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writel_relaxed(lo, MON2_THRES_LO(m));
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/* Set the zone count thresholds for interrupts */
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writel_relaxed(zone_cnt_thres, MON2_ZONE_CNT_THRES(m));
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break;
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case MON3:
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writel_relaxed(hi, MON3_THRES_HI(m));
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writel_relaxed(med, MON3_THRES_MED(m));
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writel_relaxed(lo, MON3_THRES_LO(m));
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/* Set the zone count thresholds for interrupts */
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writel_relaxed(zone_cnt_thres, MON3_ZONE_CNT_THRES(m));
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break;
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}
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dev_dbg(m->dev, "Thres: hi:%u med:%u lo:%u\n", hi, med, lo);
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dev_dbg(m->dev, "Zone Count Thres: %0x\n", zone_cnt_thres);
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}
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static void mon_set_zones(struct bwmon *m, unsigned int sample_ms)
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static __always_inline
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void mon_set_zones(struct bwmon *m, unsigned int sample_ms,
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enum mon_reg_type type)
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{
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struct bw_hwmon *hw = &(m->hw);
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u32 zone_cnt_thres = calc_zone_counts(hw);
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mon_set_hw_sampling_window(m, sample_ms);
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set_zone_thres(m, sample_ms);
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/* Set the zone count thresholds for interrupts */
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writel_relaxed(zone_cnt_thres, MON2_ZONE_CNT_THRES(m));
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dev_dbg(m->dev, "Zone Count Thres: %0x\n", zone_cnt_thres);
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mon_set_hw_sampling_window(m, sample_ms, type);
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set_zone_thres(m, sample_ms, type);
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}
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static void mon_set_limit(struct bwmon *m, u32 count)
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@ -425,16 +505,28 @@ static unsigned long mon_get_count1(struct bwmon *m)
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return count;
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}
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static unsigned int get_zone(struct bwmon *m)
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static __always_inline
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unsigned int get_zone(struct bwmon *m, enum mon_reg_type type)
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{
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u32 zone_counts;
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u32 zone;
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zone = get_bitmask_order((m->intr_status & INT_STATUS_MASK_HWS) >> 4);
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zone = get_bitmask_order(m->intr_status);
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if (zone) {
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zone--;
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} else {
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zone_counts = readl_relaxed(MON2_ZONE_CNT(m));
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switch (type) {
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case MON1:
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WARN(1, "Invalid\n");
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return 0;
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case MON2:
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zone_counts = readl_relaxed(MON2_ZONE_CNT(m));
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break;
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case MON3:
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zone_counts = readl_relaxed(MON3_ZONE_CNT(m));
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break;
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}
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if (zone_counts) {
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zone = get_bitmask_order(zone_counts) - 1;
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zone /= 8;
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@ -445,14 +537,37 @@ static unsigned int get_zone(struct bwmon *m)
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return zone;
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}
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static unsigned long mon_get_zone_stats(struct bwmon *m)
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static __always_inline
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unsigned long get_zone_count(struct bwmon *m, unsigned int zone,
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enum mon_reg_type type)
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{
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unsigned long count;
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switch (type) {
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case MON1:
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WARN(1, "Invalid\n");
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return 0;
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case MON2:
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count = readl_relaxed(MON2_ZONE_MAX(m, zone)) + 1;
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break;
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case MON3:
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count = readl_relaxed(MON3_ZONE_MAX(m, zone));
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if (count)
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count++;
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break;
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}
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return count;
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}
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static __always_inline
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unsigned long mon_get_zone_stats(struct bwmon *m, enum mon_reg_type type)
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{
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unsigned int zone;
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unsigned long count = 0;
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zone = get_zone(m);
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count = readl_relaxed(MON2_ZONE_MAX(m, zone)) + 1;
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zone = get_zone(m, type);
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count = get_zone_count(m, zone, type);
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count *= SZ_1M;
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dev_dbg(m->dev, "Zone%d Max byte count: %08lx\n", zone, count);
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@ -470,7 +585,8 @@ unsigned long mon_get_count(struct bwmon *m, enum mon_reg_type type)
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count = mon_get_count1(m);
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break;
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case MON2:
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count = mon_get_zone_stats(m);
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case MON3:
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count = mon_get_zone_stats(m, type);
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break;
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}
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@ -515,6 +631,11 @@ static unsigned long get_bytes_and_clear2(struct bw_hwmon *hw)
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return __get_bytes_and_clear(hw, MON2);
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}
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static unsigned long get_bytes_and_clear3(struct bw_hwmon *hw)
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{
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return __get_bytes_and_clear(hw, MON3);
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}
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static unsigned long set_thres(struct bw_hwmon *hw, unsigned long bytes)
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{
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unsigned long count;
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@ -537,20 +658,33 @@ static unsigned long set_thres(struct bw_hwmon *hw, unsigned long bytes)
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return count;
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}
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static unsigned long set_hw_events(struct bw_hwmon *hw, unsigned int sample_ms)
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static unsigned long
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__set_hw_events(struct bw_hwmon *hw, unsigned int sample_ms,
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enum mon_reg_type type)
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{
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struct bwmon *m = to_bwmon(hw);
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mon_disable(m, MON2);
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mon_clear(m, false, MON2);
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mon_irq_clear(m, MON2);
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mon_disable(m, type);
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mon_clear(m, false, type);
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mon_irq_clear(m, type);
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mon_set_zones(m, sample_ms);
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mon_enable(m, MON2);
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mon_set_zones(m, sample_ms, type);
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mon_enable(m, type);
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return 0;
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}
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static unsigned long set_hw_events(struct bw_hwmon *hw, unsigned int sample_ms)
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{
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return __set_hw_events(hw, sample_ms, MON2);
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}
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static unsigned long
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set_hw_events3(struct bw_hwmon *hw, unsigned int sample_ms)
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{
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return __set_hw_events(hw, sample_ms, MON3);
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}
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static irqreturn_t
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__bwmon_intr_handler(int irq, void *dev, enum mon_reg_type type)
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||||
{
|
||||
|
|
@ -576,6 +710,11 @@ static irqreturn_t bwmon_intr_handler2(int irq, void *dev)
|
|||
return __bwmon_intr_handler(irq, dev, MON2);
|
||||
}
|
||||
|
||||
static irqreturn_t bwmon_intr_handler3(int irq, void *dev)
|
||||
{
|
||||
return __bwmon_intr_handler(irq, dev, MON3);
|
||||
}
|
||||
|
||||
static irqreturn_t bwmon_intr_thread(int irq, void *dev)
|
||||
{
|
||||
struct bwmon *m = dev;
|
||||
|
|
@ -601,6 +740,10 @@ static __always_inline int __start_bw_hwmon(struct bw_hwmon *hw,
|
|||
zone_actions = calc_zone_actions();
|
||||
handler = bwmon_intr_handler2;
|
||||
break;
|
||||
case MON3:
|
||||
zone_actions = calc_zone_actions();
|
||||
handler = bwmon_intr_handler3;
|
||||
break;
|
||||
}
|
||||
|
||||
ret = request_threaded_irq(m->irq, handler, bwmon_intr_thread,
|
||||
|
|
@ -621,10 +764,14 @@ static __always_inline int __start_bw_hwmon(struct bw_hwmon *hw,
|
|||
mon_set_limit(m, limit);
|
||||
break;
|
||||
case MON2:
|
||||
mon_set_zones(m, hw->df->profile->polling_ms);
|
||||
mon_set_zones(m, hw->df->profile->polling_ms, type);
|
||||
/* Set the zone actions to increment appropriate counters */
|
||||
writel_relaxed(zone_actions, MON2_ZONE_ACTIONS(m));
|
||||
break;
|
||||
case MON3:
|
||||
mon_set_zones(m, hw->df->profile->polling_ms, type);
|
||||
/* Set the zone actions to increment appropriate counters */
|
||||
writel_relaxed(zone_actions, MON3_ZONE_ACTIONS(m));
|
||||
}
|
||||
|
||||
mon_irq_clear(m, type);
|
||||
|
|
@ -644,6 +791,11 @@ static int start_bw_hwmon2(struct bw_hwmon *hw, unsigned long mbps)
|
|||
return __start_bw_hwmon(hw, mbps, MON2);
|
||||
}
|
||||
|
||||
static int start_bw_hwmon3(struct bw_hwmon *hw, unsigned long mbps)
|
||||
{
|
||||
return __start_bw_hwmon(hw, mbps, MON3);
|
||||
}
|
||||
|
||||
static __always_inline
|
||||
void __stop_bw_hwmon(struct bw_hwmon *hw, enum mon_reg_type type)
|
||||
{
|
||||
|
|
@ -666,6 +818,11 @@ static void stop_bw_hwmon2(struct bw_hwmon *hw)
|
|||
return __stop_bw_hwmon(hw, MON2);
|
||||
}
|
||||
|
||||
static void stop_bw_hwmon3(struct bw_hwmon *hw)
|
||||
{
|
||||
return __stop_bw_hwmon(hw, MON3);
|
||||
}
|
||||
|
||||
static __always_inline
|
||||
int __suspend_bw_hwmon(struct bw_hwmon *hw, enum mon_reg_type type)
|
||||
{
|
||||
|
|
@ -689,7 +846,13 @@ static int suspend_bw_hwmon2(struct bw_hwmon *hw)
|
|||
return __suspend_bw_hwmon(hw, MON2);
|
||||
}
|
||||
|
||||
static int __resume_bw_hwmon(struct bw_hwmon *hw, enum mon_reg_type type)
|
||||
static int suspend_bw_hwmon3(struct bw_hwmon *hw)
|
||||
{
|
||||
return __suspend_bw_hwmon(hw, MON3);
|
||||
}
|
||||
|
||||
static __always_inline
|
||||
int __resume_bw_hwmon(struct bw_hwmon *hw, enum mon_reg_type type)
|
||||
{
|
||||
struct bwmon *m = to_bwmon(hw);
|
||||
int ret;
|
||||
|
|
@ -702,6 +865,9 @@ static int __resume_bw_hwmon(struct bw_hwmon *hw, enum mon_reg_type type)
|
|||
case MON2:
|
||||
handler = bwmon_intr_handler2;
|
||||
break;
|
||||
case MON3:
|
||||
handler = bwmon_intr_handler3;
|
||||
break;
|
||||
}
|
||||
|
||||
mon_clear(m, false, type);
|
||||
|
|
@ -730,6 +896,11 @@ static int resume_bw_hwmon2(struct bw_hwmon *hw)
|
|||
return __resume_bw_hwmon(hw, MON2);
|
||||
}
|
||||
|
||||
static int resume_bw_hwmon3(struct bw_hwmon *hw)
|
||||
{
|
||||
return __resume_bw_hwmon(hw, MON3);
|
||||
}
|
||||
|
||||
/*************************************************************************/
|
||||
|
||||
static const struct bwmon_spec spec[] = {
|
||||
|
|
@ -737,25 +908,40 @@ static const struct bwmon_spec spec[] = {
|
|||
.wrap_on_thres = true,
|
||||
.overflow = false,
|
||||
.throt_adj = false,
|
||||
.hw_sampling = false
|
||||
.hw_sampling = false,
|
||||
.has_global_base = true,
|
||||
.reg_type = MON1,
|
||||
},
|
||||
[1] = {
|
||||
.wrap_on_thres = false,
|
||||
.overflow = true,
|
||||
.throt_adj = false,
|
||||
.hw_sampling = false
|
||||
.hw_sampling = false,
|
||||
.has_global_base = true,
|
||||
.reg_type = MON1,
|
||||
},
|
||||
[2] = {
|
||||
.wrap_on_thres = false,
|
||||
.overflow = true,
|
||||
.throt_adj = true,
|
||||
.hw_sampling = false
|
||||
.hw_sampling = false,
|
||||
.has_global_base = true,
|
||||
.reg_type = MON1,
|
||||
},
|
||||
[3] = {
|
||||
.wrap_on_thres = false,
|
||||
.overflow = true,
|
||||
.throt_adj = true,
|
||||
.hw_sampling = true
|
||||
.hw_sampling = true,
|
||||
.has_global_base = true,
|
||||
.reg_type = MON2,
|
||||
},
|
||||
[4] = {
|
||||
.wrap_on_thres = false,
|
||||
.overflow = true,
|
||||
.throt_adj = false,
|
||||
.hw_sampling = true,
|
||||
.reg_type = MON3,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
@ -764,6 +950,7 @@ static const struct of_device_id bimc_bwmon_match_table[] = {
|
|||
{ .compatible = "qcom,bimc-bwmon2", .data = &spec[1] },
|
||||
{ .compatible = "qcom,bimc-bwmon3", .data = &spec[2] },
|
||||
{ .compatible = "qcom,bimc-bwmon4", .data = &spec[3] },
|
||||
{ .compatible = "qcom,bimc-bwmon5", .data = &spec[4] },
|
||||
{}
|
||||
};
|
||||
|
||||
|
|
@ -780,13 +967,6 @@ static int bimc_bwmon_driver_probe(struct platform_device *pdev)
|
|||
return -ENOMEM;
|
||||
m->dev = dev;
|
||||
|
||||
ret = of_property_read_u32(dev->of_node, "qcom,mport", &data);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "mport not found! (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
m->mport = data;
|
||||
|
||||
m->spec = of_device_get_match_data(dev);
|
||||
if (!m->spec) {
|
||||
dev_err(dev, "Unknown device type!\n");
|
||||
|
|
@ -804,15 +984,26 @@ static int bimc_bwmon_driver_probe(struct platform_device *pdev)
|
|||
return -ENOMEM;
|
||||
}
|
||||
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "global_base");
|
||||
if (!res) {
|
||||
dev_err(dev, "global_base not found!\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
m->global_base = devm_ioremap(dev, res->start, resource_size(res));
|
||||
if (!m->global_base) {
|
||||
dev_err(dev, "Unable map global_base!\n");
|
||||
return -ENOMEM;
|
||||
if (m->spec->has_global_base) {
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
||||
"global_base");
|
||||
if (!res) {
|
||||
dev_err(dev, "global_base not found!\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
m->global_base = devm_ioremap(dev, res->start,
|
||||
resource_size(res));
|
||||
if (!m->global_base) {
|
||||
dev_err(dev, "Unable map global_base!\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
ret = of_property_read_u32(dev->of_node, "qcom,mport", &data);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "mport not found! (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
m->mport = data;
|
||||
}
|
||||
|
||||
m->irq = platform_get_irq(pdev, 0);
|
||||
|
|
@ -832,20 +1023,33 @@ static int bimc_bwmon_driver_probe(struct platform_device *pdev)
|
|||
dev_err(dev, "HW sampling rate not specified!\n");
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
switch (m->spec->reg_type) {
|
||||
case MON3:
|
||||
m->hw.start_hwmon = start_bw_hwmon3;
|
||||
m->hw.stop_hwmon = stop_bw_hwmon3;
|
||||
m->hw.suspend_hwmon = suspend_bw_hwmon3;
|
||||
m->hw.resume_hwmon = resume_bw_hwmon3;
|
||||
m->hw.get_bytes_and_clear = get_bytes_and_clear3;
|
||||
m->hw.set_hw_events = set_hw_events3;
|
||||
break;
|
||||
case MON2:
|
||||
m->hw.start_hwmon = start_bw_hwmon2;
|
||||
m->hw.stop_hwmon = stop_bw_hwmon2;
|
||||
m->hw.suspend_hwmon = suspend_bw_hwmon2;
|
||||
m->hw.resume_hwmon = resume_bw_hwmon2;
|
||||
m->hw.get_bytes_and_clear = get_bytes_and_clear2;
|
||||
m->hw.set_hw_events = set_hw_events;
|
||||
} else {
|
||||
break;
|
||||
case MON1:
|
||||
m->hw.start_hwmon = start_bw_hwmon;
|
||||
m->hw.stop_hwmon = stop_bw_hwmon;
|
||||
m->hw.suspend_hwmon = suspend_bw_hwmon;
|
||||
m->hw.resume_hwmon = resume_bw_hwmon;
|
||||
m->hw.get_bytes_and_clear = get_bytes_and_clear;
|
||||
m->hw.set_thres = set_thres;
|
||||
break;
|
||||
}
|
||||
|
||||
if (m->spec->throt_adj) {
|
||||
|
|
|
|||
Loading…
Reference in a new issue