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Merge "clk: qcom: gcc-yupik: Use floor ops for SDCC clocks"

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This commit is contained in:
qctecmdr 2021-03-01 10:10:56 -08:00 • committed by Gerrit - the friendly Code Review server
commit 0ef7ecb4c0
2 changed files with 6 additions and 4 deletions
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2
drivers/clk/qcom/clk-rcg2.c
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@ -811,6 +811,8 @@ const struct clk_ops clk_rcg2_floor_ops = {
.pre_rate_change = clk_pre_change_regmap,
.post_rate_change = clk_post_change_regmap,
.is_enabled = clk_rcg2_is_enabled,
.enable = clk_rcg2_enable,
.disable = clk_rcg2_disable,
.get_parent = clk_rcg2_get_parent,
.set_parent = clk_rcg2_set_parent,
.recalc_rate = clk_rcg2_recalc_rate,

8
drivers/clk/qcom/gcc-yupik.c
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@ -1139,7 +1139,7 @@ static struct clk_rcg2 gcc_sdcc1_apps_clk_src = {
.name = "gcc_sdcc1_apps_clk_src",
.parent_data = gcc_parent_data_8,
.num_parents = ARRAY_SIZE(gcc_parent_data_8),
.ops = &clk_rcg2_ops,
.ops = &clk_rcg2_floor_ops,
},
.clkr.vdd_data = {
.vdd_class = &vdd_cx,
@ -1168,7 +1168,7 @@ static struct clk_rcg2 gcc_sdcc1_ice_core_clk_src = {
.name = "gcc_sdcc1_ice_core_clk_src",
.parent_data = gcc_parent_data_1,
.num_parents = ARRAY_SIZE(gcc_parent_data_1),
.ops = &clk_rcg2_ops,
.ops = &clk_rcg2_floor_ops,
},
.clkr.vdd_data = {
.vdd_class = &vdd_cx,
@ -1201,7 +1201,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = {
.name = "gcc_sdcc2_apps_clk_src",
.parent_data = gcc_parent_data_9,
.num_parents = ARRAY_SIZE(gcc_parent_data_9),
.ops = &clk_rcg2_ops,
.ops = &clk_rcg2_floor_ops,
},
.clkr.vdd_data = {
.vdd_class = &vdd_cx,
@ -1232,7 +1232,7 @@ static struct clk_rcg2 gcc_sdcc4_apps_clk_src = {
.name = "gcc_sdcc4_apps_clk_src",
.parent_data = gcc_parent_data_1,
.num_parents = ARRAY_SIZE(gcc_parent_data_1),
.ops = &clk_rcg2_ops,
.ops = &clk_rcg2_floor_ops,
},
.clkr.vdd_data = {
.vdd_class = &vdd_cx,