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msm: pcie: add sysfs entry to output PCIe link ASPM stats
Provide users a way to check how many times the link between root complex and its partner have entered L0s, L1, L1.1, and L1.2. Change-Id: If3170d26221d05039afc0a2433bebaf0c3799549 Signed-off-by: Tony Truong <truong@codeaurora.org>
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1 changed files with 36 additions and 0 deletions
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@ -83,6 +83,11 @@
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#define PCIE20_LINK_DOWN_AXI_ECAM_BLOCK_STATUS (0x630)
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#define PCIE20_PARF_STATUS (0x230)
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#define PCIE20_PARF_DEBUG_CNT_IN_L0S (0xc10)
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#define PCIE20_PARF_DEBUG_CNT_IN_L1 (0xc0c)
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#define PCIE20_PARF_DEBUG_CNT_IN_L1SUB_L1 (0xc84)
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#define PCIE20_PARF_DEBUG_CNT_IN_L1SUB_L2 (0xc88)
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#define PCIE20_PARF_CLKREQ_OVERRIDE (0x2b0)
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#define PCIE20_PARF_CLKREQ_IN_VALUE (BIT(3))
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#define PCIE20_PARF_CLKREQ_IN_ENABLE (BIT(1))
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@ -2136,6 +2141,36 @@ static ssize_t enumerate_store(struct device *dev,
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}
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static DEVICE_ATTR_WO(enumerate);
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static ssize_t aspm_stat_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct msm_pcie_dev_t *pcie_dev = dev_get_drvdata(dev);
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if (!pcie_dev->mhi)
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return scnprintf(buf, PAGE_SIZE,
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"PCIe: RC%d: No dev or MHI space found\n",
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pcie_dev->rc_idx);
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if (pcie_dev->link_status != MSM_PCIE_LINK_ENABLED)
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return scnprintf(buf, PAGE_SIZE,
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"PCIe: RC%d: registers are not accessible\n",
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pcie_dev->rc_idx);
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return scnprintf(buf, PAGE_SIZE,
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"PCIe: RC%d: L0s: %u L1: %u L1.1: %u L1.2: %u\n",
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pcie_dev->rc_idx,
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readl_relaxed(pcie_dev->mhi +
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PCIE20_PARF_DEBUG_CNT_IN_L0S),
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readl_relaxed(pcie_dev->mhi +
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PCIE20_PARF_DEBUG_CNT_IN_L1),
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readl_relaxed(pcie_dev->mhi +
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PCIE20_PARF_DEBUG_CNT_IN_L1SUB_L1),
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readl_relaxed(pcie_dev->mhi +
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PCIE20_PARF_DEBUG_CNT_IN_L1SUB_L2));
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}
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static DEVICE_ATTR_RO(aspm_stat);
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static ssize_t l23_rdy_poll_timeout_show(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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@ -2170,6 +2205,7 @@ static DEVICE_ATTR_RW(l23_rdy_poll_timeout);
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static struct attribute *msm_pcie_debug_attrs[] = {
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&dev_attr_link_check_max_count.attr,
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&dev_attr_enumerate.attr,
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&dev_attr_aspm_stat.attr,
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&dev_attr_l23_rdy_poll_timeout.attr,
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NULL,
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};
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