A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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ARM: dts: msm: add LTR entries for HSP direct connects on sdxlemur

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HSP requires PCIe host to have LTR programmed for LPM usecases,
therefore, add the required LTR entries for PCIe on sdxlemur.

Change-Id: I38f82152f2113dc59c2da89f2328d51c2d161eb8
This commit is contained in:
Tony Truong 2020-11-11 14:50:27 -08:00 • committed by Gerrit - the friendly Code Review server
commit 1d9db2ceb7
3 changed files with 6 additions and 0 deletions
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2
qcom/sdxlemur-cdp.dtsi
View file

@ -32,4 +32,6 @@
&pcie0 {
qcom,boot-option = <0x1>;
qcom,l1-2-th-scale = <2>; /* 1us */
qcom,l1-2-th-value = <70>;
};

2
qcom/sdxlemur-mtp-mbb.dtsi
View file

@ -12,6 +12,8 @@
&pcie0 {
qcom,boot-option = <0x1>;
qcom,l1-2-th-scale = <2>; /* 1us */
qcom,l1-2-th-value = <70>;
};
&sdhc_1 {

2
qcom/sdxlemur-rcm-rc.dtsi
View file

@ -12,4 +12,6 @@
&pcie0 {
qcom,boot-option = <0x1>;
qcom,l1-2-th-scale = <2>; /* 1us */
qcom,l1-2-th-value = <70>;
};