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ARM: dts: msm: Enable the graphics SMMU on Lahaina
Fix the size of the register space for the graphics SMMU, and enable it, as well as the associated test devices. Change-Id: I5963b9d5a5fb0ad1d55a1e2011ee1bfb5d961fee
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1 changed files with 1 additions and 6 deletions
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@ -3,7 +3,7 @@
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&soc {
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kgsl_smmu: kgsl-smmu@3da0000 {
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compatible = "qcom,qsmmu-v500";
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reg = <0x3DA0000 0x10000>,
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reg = <0x3DA0000 0x20000>,
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<0x3DC2000 0x20>;
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reg-names = "base", "tcu-base";
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#iommu-cells = <2>;
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@ -13,7 +13,6 @@
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#size-cells = <1>;
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#address-cells = <1>;
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ranges;
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status = "disabled";
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clocks = <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>,
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<&clock_gcc GCC_GPU_SNOC_DVM_GFX_CLK>,
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@ -43,7 +42,6 @@
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<0x3DC2200 0x8>;
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reg-names = "base", "status-reg";
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qcom,stream-id-range = <0x0 0x400>;
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status = "disabled";
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};
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gfx_1_tbu: gfx_1_tbu@3dc9000 {
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@ -52,7 +50,6 @@
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<0x3DC2208 0x8>;
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reg-names = "base", "status-reg";
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qcom,stream-id-range = <0x400 0x400>;
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status = "disabled";
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};
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};
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@ -272,14 +269,12 @@
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};
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kgsl_iommu_test_device {
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status = "disabled";
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compatible = "iommu-debug-test";
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iommus = <&kgsl_smmu 0x7 0>;
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qcom,iommu-dma = "disabled";
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};
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kgsl_iommu_coherent_test_device {
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status = "disabled";
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compatible = "iommu-debug-test";
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iommus = <&kgsl_smmu 0x9 0>;
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qcom,iommu-dma = "disabled";
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