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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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Merge "clk: qcom: define vdd_levels enum and vdd_corner[] map"
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commit
1ee5b61154
3 changed files with 49 additions and 12 deletions
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2014, The Linux Foundation. All rights reserved.
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* Copyright (c) 2014, 2016-2019, The Linux Foundation. All rights reserved.
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*/
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#include <linux/kernel.h>
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@ -35,8 +35,10 @@ static long div_round_rate(struct clk_hw *hw, unsigned long rate,
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{
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struct clk_regmap_div *divider = to_clk_regmap_div(hw);
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return divider_round_rate(hw, rate, prate, NULL, divider->width,
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CLK_DIVIDER_ROUND_CLOSEST);
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return divider_round_rate(hw, rate, prate, divider->table,
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divider->width,
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CLK_DIVIDER_ROUND_CLOSEST |
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divider->flags);
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}
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static int div_set_rate(struct clk_hw *hw, unsigned long rate,
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@ -46,8 +48,9 @@ static int div_set_rate(struct clk_hw *hw, unsigned long rate,
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struct clk_regmap *clkr = ÷r->clkr;
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u32 div;
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div = divider_get_val(rate, parent_rate, NULL, divider->width,
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CLK_DIVIDER_ROUND_CLOSEST);
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div = divider_get_val(rate, parent_rate, divider->table,
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divider->width, CLK_DIVIDER_ROUND_CLOSEST |
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divider->flags);
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return regmap_update_bits(clkr->regmap, divider->reg,
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(BIT(divider->width) - 1) << divider->shift,
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@ -65,8 +68,9 @@ static unsigned long div_recalc_rate(struct clk_hw *hw,
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div >>= divider->shift;
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div &= BIT(divider->width) - 1;
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return divider_recalc_rate(hw, parent_rate, div, NULL,
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CLK_DIVIDER_ROUND_CLOSEST, divider->width);
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return divider_recalc_rate(hw, parent_rate, div, divider->table,
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CLK_DIVIDER_ROUND_CLOSEST | divider->flags,
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divider->width);
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}
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const struct clk_ops clk_regmap_div_ops = {
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@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2014, The Linux Foundation. All rights reserved.
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* Copyright (c) 2014, 2016-2019, The Linux Foundation. All rights reserved.
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*/
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#ifndef __QCOM_CLK_REGMAP_DIVIDER_H__
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@ -10,10 +10,12 @@
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#include "clk-regmap.h"
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struct clk_regmap_div {
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u32 reg;
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u32 shift;
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u32 width;
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struct clk_regmap clkr;
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u32 reg;
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u32 shift;
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u32 width;
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u32 flags;
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const struct clk_div_table *table;
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struct clk_regmap clkr;
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};
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extern const struct clk_ops clk_regmap_div_ops;
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31
drivers/clk/qcom/vdd-level.h
Normal file
31
drivers/clk/qcom/vdd-level.h
Normal file
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@ -0,0 +1,31 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* Copyright (c) 2019, The Linux Foundation. All rights reserved. */
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#ifndef __DRIVERS_CLK_QCOM_VDD_LEVEL_H
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#define __DRIVERS_CLK_QCOM_VDD_LEVEL_H
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#include <linux/regulator/consumer.h>
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#include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>
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enum vdd_levels {
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VDD_NONE,
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VDD_MIN, /* MIN_SVS */
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VDD_LOWER, /* LOW_SVS / SVS2 */
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VDD_LOW, /* SVS */
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VDD_LOW_L1, /* SVS_L1 */
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VDD_NOMINAL, /* NOM */
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VDD_HIGH, /* TURBO */
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VDD_NUM,
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};
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static int vdd_corner[] = {
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[VDD_NONE] = 0,
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[VDD_MIN] = RPMH_REGULATOR_LEVEL_MIN_SVS,
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[VDD_LOWER] = RPMH_REGULATOR_LEVEL_LOW_SVS,
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[VDD_LOW] = RPMH_REGULATOR_LEVEL_SVS,
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[VDD_LOW_L1] = RPMH_REGULATOR_LEVEL_SVS_L1,
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[VDD_NOMINAL] = RPMH_REGULATOR_LEVEL_NOM,
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[VDD_HIGH] = RPMH_REGULATOR_LEVEL_TURBO,
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};
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#endif
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