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Merge "ARM: dts: msm: Mark PMIC QUPs as critical clock devices for YUPIK"

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qctecmdr 2021-02-15 06:09:13 -08:00 • committed by Gerrit - the friendly Code Review server
commit 24e4235dba
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24
bindings/clock/qcom,gcc.txt
View file

@ -53,6 +53,10 @@ For more details on the TSENS properties please refer
Documentation/devicetree/bindings/thermal/qcom-tsens.txt
- protected-clocks : Protected clock specifier list as per common clock
binding.
- qcom,critical-clocks : List of clock specifiers that should be enabled during
probe and not registered with the clock framework.
- qcom,critical-devices : List of device phandles whose associated clocks
should be enabled during probe and not registered with the clock framework.
Example:
clock-controller@900000 {
@ -87,3 +91,23 @@ Example of GCC with protected-clocks properties:
<GCC_LPASS_Q6_AXI_CLK>,
<GCC_LPASS_SWAY_CLK>;
};
Example of GCC with qcom,critical-clocks properties:
clock-controller@100000 {
compatible = "qcom,waipio-gcc", "syscon";
reg = <0x100000 0x1f4200>;
#clock-cells = <1>;
#reset-cells = <1>;
qcom,critical-clocks = <GCC_QUPV3_WRAP0_S5_CLK>,
<GCC_QUPV3_WRAP_0_M_AHB_CLK>,
<GCC_QUPV3_WRAP_0_S_AHB_CLK>;
};
Example of GCC with qcom,critical-devices properties:
clock-controller@100000 {
compatible = "qcom,waipio-gcc", "syscon";
reg = <0x100000 0x1f4200>;
#clock-cells = <1>;
#reset-cells = <1>;
qcom,critical-devices = <&qupv3_se5_i2c>;
};

8
qcom/yupik-pmic-overlay.dtsi
View file

@ -241,6 +241,14 @@
};
};
/*
* Each QUP device that's a parent to PMIC must be listed as a critical device
* to GCC
*/
&gcc {
qcom,critical-devices = <&qupv3_se1_i2c>;
};
&qupv3_se1_i2c {
#address-cells = <1>;
#size-cells = <0>;