Merge "ARM: dts: msm: Add devfreq-cpufreq for SDXNIGHTJAR target"

This commit is contained in:
qctecmdr 2021-01-21 04:59:11 -08:00 • committed by Gerrit - the friendly Code Review server
commit 2afd940a01

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@ -4,6 +4,10 @@
#include <dt-bindings/clock/qcom,gcc-sdxnightjar.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/regulator/qcom,rpm-smd-regulator.h>
#include <dt-bindings/clock/qcom,apsscc-sdxlemur.h>
#define MHZ_TO_MBPS(mhz, w) ((mhz * 1000000 * w) / (1024 * 1024))
#define BW_OPP_ENTRY(mhz, w) opp-mhz {opp-hz = /bits/ 64 <MHZ_TO_MBPS(mhz, w)>;}
/ {
model = "Qualcomm Technologies, Inc. SDXNIGHTJAR";
@ -266,9 +270,8 @@
qcom,msm-cpufreq {
compatible = "qcom,msm-cpufreq";
/*TODO: Fix the clock when tree is available*/
clock-names = "cpu0_clk", "cpu1_clk",
"cpu2_clk", "cpu3_clk";
clocks = <&apsscc APCS_MUX_CLK>;
clock-names = "cpu0_clk";
qcom,cpufreq-table =
< 200000 >,
< 300000 >,
@ -282,8 +285,8 @@
ahb_clk: qcom,ahb-clk-src {
compatible = "devfreq-simple-dev";
clocks = <&gcc APSS_AHB_CLK_SRC>;
clock-names = "devfreq_clk";
/*TODO: Fix the clock when tree is available*/
governor = "powersave";
freq-tbl-khz =
< 19200 >,
@ -292,6 +295,40 @@
< 133330 >;
};
cpubw: qcom,cpubw {
compatible = "qcom,devfreq-icc";
governor = "cpufreq";
interconnects = <&bimc MASTER_AMPSS_M0 &bimc SLAVE_EBI_CH0>;
qcom,active-only;
operating-points-v2 = <&ddr_bw_opp_table>;
};
ddr_bw_opp_table: ddr-bw-opp-table {
compatible = "operating-points-v2";
BW_OPP_ENTRY( 202, 8); /* 1541 MB/s */
BW_OPP_ENTRY( 404, 8); /* 3082 MB/s */
BW_OPP_ENTRY( 518, 8); /* 3952 MB/s */
};
devfreq-cpufreq {
cpubw-cpufreq {
target-dev = <&cpubw>;
cpu-to-dev-map =
< 600000 1541 >,
< 787200 3082 >,
< 1286400 3952 >;
};
cpuahb-cpufreq {
target-dev = <&ahb_clk>;
cpu-to-dev-map =
< 200000 19200 >,
< 384000 50000 >,
< 787200 100000 >,
< 1286400 133330 >;
};
};
restart@4ab000 {
compatible = "qcom,pshold";
reg = <0x4ab000 0x4>,