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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
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net: stmmac: Add multi queue support
Add multi queue support for PTP, AVB traffic. Change-Id: I083fe8fa306b01da7d1baf2ef3b13c914329dd17 Acked-by: Nagarjuna Chaganti <nchagant@qti.qualcomm.com> Signed-off-by: Suraj Jaiswal <jsuraj@codeaurora.org>
This commit is contained in:
Suraj Jaiswal
Gerrit - the friendly Code Review server
parent
f5cfd4ff35
commit
33fdbe772f
8 changed files with 300 additions and 59 deletions
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@ -19,7 +19,9 @@
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#include <linux/dma-iommu.h>
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#include <linux/iommu.h>
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#include <linux/micrel_phy.h>
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#include <linux/tcp.h>
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#include <linux/ip.h>
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#include <linux/ipv6.h>
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#include "stmmac.h"
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#include "stmmac_platform.h"
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#include "dwmac-qcom-ethqos.h"
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@ -115,6 +117,159 @@ bool phy_intr_en;
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struct emac_emb_smmu_cb_ctx emac_emb_smmu_ctx = {0};
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struct qcom_ethqos *pethqos;
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static inline unsigned int dwmac_qcom_get_eth_type(unsigned char *buf)
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{
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return
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((((u16)buf[QTAG_ETH_TYPE_OFFSET] << 8) |
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buf[QTAG_ETH_TYPE_OFFSET + 1]) == ETH_P_8021Q) ?
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(((u16)buf[QTAG_VLAN_ETH_TYPE_OFFSET] << 8) |
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buf[QTAG_VLAN_ETH_TYPE_OFFSET + 1]) :
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(((u16)buf[QTAG_ETH_TYPE_OFFSET] << 8) |
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buf[QTAG_ETH_TYPE_OFFSET + 1]);
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}
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static inline unsigned int dwmac_qcom_get_vlan_ucp(unsigned char *buf)
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{
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return
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(((u16)buf[QTAG_UCP_FIELD_OFFSET] << 8)
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| buf[QTAG_UCP_FIELD_OFFSET + 1]);
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}
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u16 dwmac_qcom_select_queue(struct net_device *dev,
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struct sk_buff *skb,
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struct net_device *sb_dev)
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{
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u16 txqueue_select = ALL_OTHER_TRAFFIC_TX_CHANNEL;
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unsigned int eth_type, priority;
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/* Retrieve ETH type */
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eth_type = dwmac_qcom_get_eth_type(skb->data);
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if (eth_type == ETH_P_TSN) {
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/* Read VLAN priority field from skb->data */
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priority = dwmac_qcom_get_vlan_ucp(skb->data);
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priority >>= VLAN_TAG_UCP_SHIFT;
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if (priority == CLASS_A_TRAFFIC_UCP)
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txqueue_select = CLASS_A_TRAFFIC_TX_CHANNEL;
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else if (priority == CLASS_B_TRAFFIC_UCP)
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txqueue_select = CLASS_B_TRAFFIC_TX_CHANNEL;
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else
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txqueue_select = ALL_OTHER_TX_TRAFFIC_IPA_DISABLED;
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} else {
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/* VLAN tagged IP packet or any other non vlan packets (PTP)*/
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txqueue_select = ALL_OTHER_TX_TRAFFIC_IPA_DISABLED;
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}
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ETHQOSDBG("tx_queue %d\n", txqueue_select);
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return txqueue_select;
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}
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void dwmac_qcom_program_avb_algorithm(struct stmmac_priv *priv,
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struct ifr_data_struct *req)
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{
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struct dwmac_qcom_avb_algorithm l_avb_struct, *u_avb_struct =
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(struct dwmac_qcom_avb_algorithm *)req->ptr;
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struct dwmac_qcom_avb_algorithm_params *avb_params;
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ETHQOSDBG("\n");
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if (copy_from_user(&l_avb_struct, (void __user *)u_avb_struct,
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sizeof(struct dwmac_qcom_avb_algorithm)))
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ETHQOSERR("Failed to fetch AVB Struct\n");
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if (priv->speed == SPEED_1000)
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avb_params = &l_avb_struct.speed1000params;
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else
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avb_params = &l_avb_struct.speed100params;
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/* Application uses 1 for CLASS A traffic and
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* 2 for CLASS B traffic
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* Configure right channel accordingly
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*/
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if (l_avb_struct.qinx == 1)
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l_avb_struct.qinx = CLASS_A_TRAFFIC_TX_CHANNEL;
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else if (l_avb_struct.qinx == 2)
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l_avb_struct.qinx = CLASS_B_TRAFFIC_TX_CHANNEL;
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priv->plat->tx_queues_cfg[l_avb_struct.qinx].mode_to_use =
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MTL_QUEUE_AVB;
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priv->plat->tx_queues_cfg[l_avb_struct.qinx].send_slope =
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avb_params->send_slope,
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priv->plat->tx_queues_cfg[l_avb_struct.qinx].idle_slope =
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avb_params->idle_slope,
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priv->plat->tx_queues_cfg[l_avb_struct.qinx].high_credit =
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avb_params->hi_credit,
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priv->plat->tx_queues_cfg[l_avb_struct.qinx].low_credit =
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avb_params->low_credit,
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priv->hw->mac->config_cbs(priv->hw,
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priv->plat->tx_queues_cfg[l_avb_struct.qinx].send_slope,
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priv->plat->tx_queues_cfg[l_avb_struct.qinx].idle_slope,
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priv->plat->tx_queues_cfg[l_avb_struct.qinx].high_credit,
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priv->plat->tx_queues_cfg[l_avb_struct.qinx].low_credit,
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l_avb_struct.qinx);
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ETHQOSDBG("\n");
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}
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unsigned int dwmac_qcom_get_plat_tx_coal_frames(struct sk_buff *skb)
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{
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bool is_udp;
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unsigned int eth_type;
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eth_type = dwmac_qcom_get_eth_type(skb->data);
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#ifdef CONFIG_PTPSUPPORT_OBJ
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if (eth_type == ETH_P_1588)
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return PTP_INT_MOD;
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#endif
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if (eth_type == ETH_P_TSN)
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return AVB_INT_MOD;
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if (eth_type == ETH_P_IP || eth_type == ETH_P_IPV6) {
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#ifdef CONFIG_PTPSUPPORT_OBJ
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is_udp = (((eth_type == ETH_P_IP) &&
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(ip_hdr(skb)->protocol ==
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IPPROTO_UDP)) ||
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((eth_type == ETH_P_IPV6) &&
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(ipv6_hdr(skb)->nexthdr ==
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IPPROTO_UDP)));
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if (is_udp && ((udp_hdr(skb)->dest ==
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htons(PTP_UDP_EV_PORT)) ||
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(udp_hdr(skb)->dest ==
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htons(PTP_UDP_GEN_PORT))))
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return PTP_INT_MOD;
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#endif
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return IP_PKT_INT_MOD;
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}
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return DEFAULT_INT_MOD;
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}
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int ethqos_handle_prv_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
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{
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struct stmmac_priv *pdata = netdev_priv(dev);
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struct ifr_data_struct req;
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int ret = 0;
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if (copy_from_user(&req, ifr->ifr_ifru.ifru_data,
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sizeof(struct ifr_data_struct)))
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return -EFAULT;
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switch (req.cmd) {
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case ETHQOS_CONFIG_PPSOUT_CMD:
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ret = ppsout_config(pdata, &req);
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break;
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case ETHQOS_AVB_ALGORITHM:
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dwmac_qcom_program_avb_algorithm(pdata, &req);
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break;
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default:
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break;
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}
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return ret;
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}
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static int rgmii_readl(struct qcom_ethqos *ethqos, unsigned int offset)
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{
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return readl(ethqos->rgmii_base + offset);
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@ -771,6 +926,7 @@ static int qcom_ethqos_probe(struct platform_device *pdev)
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plat_dat->bsp_priv = ethqos;
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plat_dat->fix_mac_speed = ethqos_fix_mac_speed;
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plat_dat->tx_select_queue = dwmac_qcom_select_queue;
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plat_dat->has_gmac4 = 1;
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plat_dat->pmt = 1;
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plat_dat->tso_en = of_property_read_bool(np, "snps,tso");
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@ -26,6 +26,8 @@
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#define EMAC_HW_vMAX 9
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#define ETHQOS_CONFIG_PPSOUT_CMD 44
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#define ETHQOS_AVB_ALGORITHM 27
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#define MAC_PPS_CONTROL 0x00000b70
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#define PPS_MAXIDX(x) ((((x) + 1) * 8) - 1)
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#define PPS_MINIDX(x) ((x) * 8)
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@ -162,4 +164,61 @@ int create_pps_interrupt_device_node(dev_t *pps_dev_t,
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struct cdev **pps_cdev,
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struct class **pps_class,
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char *pps_dev_node_name);
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int ppsout_config(struct stmmac_priv *priv, struct ifr_data_struct *req);
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u16 dwmac_qcom_select_queue(struct net_device *dev,
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struct sk_buff *skb,
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struct net_device *sb_dev);
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#define QTAG_VLAN_ETH_TYPE_OFFSET 16
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#define QTAG_UCP_FIELD_OFFSET 14
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#define QTAG_ETH_TYPE_OFFSET 12
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#define PTP_UDP_EV_PORT 0x013F
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#define PTP_UDP_GEN_PORT 0x0140
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#define IPA_DMA_TX_CH 0
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#define IPA_DMA_RX_CH 0
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#define VLAN_TAG_UCP_SHIFT 13
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#define CLASS_A_TRAFFIC_UCP 3
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#define CLASS_A_TRAFFIC_TX_CHANNEL 3
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#define CLASS_B_TRAFFIC_UCP 2
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#define CLASS_B_TRAFFIC_TX_CHANNEL 2
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#define NON_TAGGED_IP_TRAFFIC_TX_CHANNEL 1
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#define ALL_OTHER_TRAFFIC_TX_CHANNEL 1
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#define ALL_OTHER_TX_TRAFFIC_IPA_DISABLED 0
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#define DEFAULT_INT_MOD 1
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#define AVB_INT_MOD 8
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#define IP_PKT_INT_MOD 32
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#define PTP_INT_MOD 1
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enum dwmac_qcom_queue_operating_mode {
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DWMAC_QCOM_QDISABLED = 0X0,
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DWMAC_QCOM_QAVB,
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DWMAC_QCOM_QDCB,
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DWMAC_QCOM_QGENERIC
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};
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struct dwmac_qcom_avb_algorithm_params {
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unsigned int idle_slope;
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unsigned int send_slope;
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unsigned int hi_credit;
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unsigned int low_credit;
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};
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struct dwmac_qcom_avb_algorithm {
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unsigned int qinx;
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unsigned int algorithm;
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unsigned int cc;
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struct dwmac_qcom_avb_algorithm_params speed100params;
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struct dwmac_qcom_avb_algorithm_params speed1000params;
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enum dwmac_qcom_queue_operating_mode op_mode;
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};
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void dwmac_qcom_program_avb_algorithm(struct stmmac_priv *priv,
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struct ifr_data_struct *req);
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unsigned int dwmac_qcom_get_plat_tx_coal_frames(struct sk_buff *skb);
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#endif
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@ -107,7 +107,7 @@ static u32 pps_config_default_addend(void __iomem *ioaddr,
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priv->default_addend = 0xFFFFFFFF;
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} else {
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temp = (u64)((u64)ptp_clock << 32);
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priv->default_addend = div_u64(temp, 250000000);
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priv->default_addend = div_u64(temp, priv->plat->clk_ptp_rate);
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}
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priv->hw->ptp->config_addend(ioaddr, priv->default_addend);
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@ -192,16 +192,21 @@ static void ethqos_unregister_pps_isr(struct stmmac_priv *priv, int ch)
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int ppsout_config(struct stmmac_priv *priv, struct ifr_data_struct *req)
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{
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struct pps_cfg *eth_pps_cfg = (struct pps_cfg *)req->ptr;
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int interval, width;
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u32 sub_second_inc, value;
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void __iomem *ioaddr = priv->ioaddr;
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u32 val;
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struct pps_cfg eth_pps_cfg;
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if (!eth_pps_cfg->ppsout_start) {
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ppsout_stop(priv, eth_pps_cfg);
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if (eth_pps_cfg->ppsout_ch == DWC_ETH_QOS_PPS_CH_2 ||
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eth_pps_cfg->ppsout_ch == DWC_ETH_QOS_PPS_CH_3)
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ethqos_unregister_pps_isr(priv, eth_pps_cfg->ppsout_ch);
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if (copy_from_user(ð_pps_cfg, (void __user *)req->ptr,
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sizeof(struct pps_cfg)))
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return -EFAULT;
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if (!eth_pps_cfg.ppsout_start) {
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ppsout_stop(priv, ð_pps_cfg);
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if (eth_pps_cfg.ppsout_ch == DWC_ETH_QOS_PPS_CH_2 ||
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eth_pps_cfg.ppsout_ch == DWC_ETH_QOS_PPS_CH_3)
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ethqos_unregister_pps_isr(priv, eth_pps_cfg.ppsout_ch);
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return 0;
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}
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@ -210,43 +215,43 @@ int ppsout_config(struct stmmac_priv *priv, struct ifr_data_struct *req)
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priv->hw->ptp->init_systime(priv->ptpaddr, 0, 0);
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priv->hw->ptp->adjust_systime(priv->ptpaddr, 0, 0, 0, 1);
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u32 val = readl_relaxed(ioaddr + MAC_PPS_CONTROL);
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val = readl_relaxed(ioaddr + MAC_PPS_CONTROL);
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sub_second_inc = pps_config_sub_second_increment
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(priv->ptpaddr, eth_pps_cfg->ptpclk_freq,
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(priv->ptpaddr, eth_pps_cfg.ptpclk_freq,
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priv->plat->has_gmac4);
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pps_config_default_addend(priv->ptpaddr, priv,
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eth_pps_cfg->ptpclk_freq);
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eth_pps_cfg.ptpclk_freq);
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val &= ~PPSX_MASK(eth_pps_cfg->ppsout_ch);
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val &= ~PPSX_MASK(eth_pps_cfg.ppsout_ch);
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val |= PPSCMDX(eth_pps_cfg->ppsout_ch, 0x2);
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val |= TRGTMODSELX(eth_pps_cfg->ppsout_ch, 0x2);
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val |= PPSCMDX(eth_pps_cfg.ppsout_ch, 0x2);
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val |= TRGTMODSELX(eth_pps_cfg.ppsout_ch, 0x2);
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val |= PPSEN0;
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if (eth_pps_cfg->ppsout_ch == DWC_ETH_QOS_PPS_CH_2 ||
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eth_pps_cfg->ppsout_ch == DWC_ETH_QOS_PPS_CH_3)
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ethqos_register_pps_isr(priv, eth_pps_cfg->ppsout_ch);
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if (eth_pps_cfg.ppsout_ch == DWC_ETH_QOS_PPS_CH_2 ||
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eth_pps_cfg.ppsout_ch == DWC_ETH_QOS_PPS_CH_3)
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ethqos_register_pps_isr(priv, eth_pps_cfg.ppsout_ch);
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writel_relaxed(0, ioaddr +
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MAC_PPSX_TARGET_TIME_SEC(eth_pps_cfg->ppsout_ch));
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MAC_PPSX_TARGET_TIME_SEC(eth_pps_cfg.ppsout_ch));
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writel_relaxed(0, ioaddr +
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MAC_PPSX_TARGET_TIME_NSEC(eth_pps_cfg->ppsout_ch));
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MAC_PPSX_TARGET_TIME_NSEC(eth_pps_cfg.ppsout_ch));
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interval = ((eth_pps_cfg->ptpclk_freq + eth_pps_cfg->ppsout_freq / 2)
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/ eth_pps_cfg->ppsout_freq);
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interval = ((eth_pps_cfg.ptpclk_freq + eth_pps_cfg.ppsout_freq / 2)
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/ eth_pps_cfg.ppsout_freq);
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width = ((interval * eth_pps_cfg->ppsout_duty) + 50) / 100 - 1;
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width = ((interval * eth_pps_cfg.ppsout_duty) + 50) / 100 - 1;
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if (width >= interval)
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width = interval - 1;
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if (width < 0)
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width = 0;
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writel_relaxed(interval, ioaddr +
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MAC_PPSX_INTERVAL(eth_pps_cfg->ppsout_ch));
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MAC_PPSX_INTERVAL(eth_pps_cfg.ppsout_ch));
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writel_relaxed(width, ioaddr + MAC_PPSX_WIDTH(eth_pps_cfg->ppsout_ch));
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writel_relaxed(width, ioaddr + MAC_PPSX_WIDTH(eth_pps_cfg.ppsout_ch));
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writel_relaxed(val, ioaddr + MAC_PPS_CONTROL);
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@ -277,27 +282,6 @@ int ethqos_init_pps(struct stmmac_priv *priv)
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return 0;
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}
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int ethqos_handle_prv_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
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{
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struct stmmac_priv *pdata = netdev_priv(dev);
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struct ifr_data_struct req;
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struct pps_cfg eth_pps_cfg;
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int ret = 0;
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if (copy_from_user(&req, ifr->ifr_ifru.ifru_data,
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sizeof(struct ifr_data_struct)))
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return -EFAULT;
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if (copy_from_user(ð_pps_cfg, req.ptr,
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sizeof(struct pps_cfg)))
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return -EFAULT;
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req.ptr = ð_pps_cfg;
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switch (req.cmd) {
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case ETHQOS_CONFIG_PPSOUT_CMD:
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ret = ppsout_config(pdata, &req);
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}
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return ret;
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}
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static ssize_t pps_fops_read(struct file *filp, char __user *buf,
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size_t count, loff_t *f_pos)
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{
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@ -23,7 +23,7 @@ static void config_sub_second_increment(void __iomem *ioaddr,
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u32 ptp_clock, int gmac4, u32 *ssinc)
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{
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u32 value = readl(ioaddr + PTP_TCR);
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unsigned long data;
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unsigned long ss_inc = 0, sns_inc = 0, ptpclock = 0;
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u32 reg_value;
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/* For GMAC3.x, 4.x versions, in "fine adjustement mode" set sub-second
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@ -35,24 +35,34 @@ static void config_sub_second_increment(void __iomem *ioaddr,
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* 2000000000ULL / ptp_clock.
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*/
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if (value & PTP_TCR_TSCFUPDT)
|
||||
data = (2000000000ULL / ptp_clock);
|
||||
ptpclock = (unsigned long)ptp_clock;
|
||||
else
|
||||
data = (1000000000ULL / ptp_clock);
|
||||
ptpclock = (unsigned long)ptp_clock;
|
||||
|
||||
ss_inc = ((1 * 1000000000ULL) / ptpclock);
|
||||
sns_inc = 1000000000ULL - (ss_inc * ptpclock); //take remainder
|
||||
|
||||
//sns_inc needs to be multiplied by 2^8, per spec.
|
||||
sns_inc = (sns_inc * 256) / ptpclock;
|
||||
|
||||
/* 0.465ns accuracy */
|
||||
if (!(value & PTP_TCR_TSCTRLSSR))
|
||||
data = (data * 1000) / 465;
|
||||
ss_inc = (ss_inc * 1000) / 465;
|
||||
|
||||
data &= PTP_SSIR_SSINC_MASK;
|
||||
ss_inc &= PTP_SSIR_SSINC_MASK;
|
||||
sns_inc &= PTP_SSIR_SNSINC_MASK;
|
||||
|
||||
reg_value = ss_inc;
|
||||
|
||||
reg_value = data;
|
||||
if (gmac4)
|
||||
reg_value <<= GMAC4_PTP_SSIR_SSINC_SHIFT;
|
||||
|
||||
reg_value |= (sns_inc << GMAC4_PTP_SSIR_SNSINC_SHIFT);
|
||||
|
||||
writel(reg_value, ioaddr + PTP_SSIR);
|
||||
|
||||
if (ssinc)
|
||||
*ssinc = data;
|
||||
*ssinc = reg_value;
|
||||
}
|
||||
|
||||
static int init_systime(void __iomem *ioaddr, u32 sec, u32 nsec)
|
||||
|
|
|
|||
|
|
@ -526,6 +526,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
|
|||
u32 ts_master_en = 0;
|
||||
u32 ts_event_en = 0;
|
||||
u32 sec_inc = 0;
|
||||
u32 av_8021asm_en = 0;
|
||||
u32 value = 0;
|
||||
bool xmac;
|
||||
|
||||
|
|
@ -640,6 +641,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
|
|||
ptp_over_ipv4_udp = PTP_TCR_TSIPV4ENA;
|
||||
ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA;
|
||||
ptp_over_ethernet = PTP_TCR_TSIPENA;
|
||||
av_8021asm_en = PTP_TCR_AV8021ASMEN;
|
||||
break;
|
||||
|
||||
case HWTSTAMP_FILTER_PTP_V2_SYNC:
|
||||
|
|
@ -652,6 +654,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
|
|||
ptp_over_ipv4_udp = PTP_TCR_TSIPV4ENA;
|
||||
ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA;
|
||||
ptp_over_ethernet = PTP_TCR_TSIPENA;
|
||||
av_8021asm_en = PTP_TCR_AV8021ASMEN;
|
||||
break;
|
||||
|
||||
case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
|
||||
|
|
@ -665,6 +668,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
|
|||
ptp_over_ipv4_udp = PTP_TCR_TSIPV4ENA;
|
||||
ptp_over_ipv6_udp = PTP_TCR_TSIPV6ENA;
|
||||
ptp_over_ethernet = PTP_TCR_TSIPENA;
|
||||
av_8021asm_en = PTP_TCR_AV8021ASMEN;
|
||||
break;
|
||||
|
||||
case HWTSTAMP_FILTER_NTP_ALL:
|
||||
|
|
@ -697,14 +701,13 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
|
|||
value = (PTP_TCR_TSENA | PTP_TCR_TSCFUPDT | PTP_TCR_TSCTRLSSR |
|
||||
tstamp_all | ptp_v2 | ptp_over_ethernet |
|
||||
ptp_over_ipv6_udp | ptp_over_ipv4_udp | ts_event_en |
|
||||
ts_master_en | snap_type_sel);
|
||||
ts_master_en | snap_type_sel | av_8021asm_en);
|
||||
stmmac_config_hw_tstamping(priv, priv->ptpaddr, value);
|
||||
|
||||
/* program Sub Second Increment reg */
|
||||
stmmac_config_sub_second_increment(priv,
|
||||
priv->ptpaddr, priv->plat->clk_ptp_rate,
|
||||
priv->ptpaddr, priv->plat->clk_ptp_req_rate,
|
||||
xmac, &sec_inc);
|
||||
temp = div_u64(1000000000ULL, sec_inc);
|
||||
|
||||
/* Store sub second increment and flags for later use */
|
||||
priv->sub_second_inc = sec_inc;
|
||||
|
|
@ -715,7 +718,7 @@ static int stmmac_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
|
|||
* addend = (2^32)/freq_div_ratio;
|
||||
* where, freq_div_ratio = 1e9ns/sec_inc
|
||||
*/
|
||||
temp = (u64)(temp << 32);
|
||||
temp = (u64)((u64)priv->plat->clk_ptp_req_rate << 32);
|
||||
priv->default_addend = div_u64(temp, priv->plat->clk_ptp_rate);
|
||||
stmmac_config_addend(priv, priv->ptpaddr, priv->default_addend);
|
||||
|
||||
|
|
@ -2615,7 +2618,9 @@ static int stmmac_hw_setup(struct net_device *dev, bool init_ptp)
|
|||
else if (ret)
|
||||
netdev_warn(priv->dev, "PTP init failed\n");
|
||||
else
|
||||
ret = clk_set_rate(priv->plat->clk_ptp_ref, 96000000);
|
||||
clk_set_rate(priv->plat->clk_ptp_ref,
|
||||
priv->plat->clk_ptp_rate);
|
||||
|
||||
ret = ethqos_init_pps(priv);
|
||||
}
|
||||
|
||||
|
|
@ -3318,7 +3323,8 @@ static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
if (priv->sarc_type)
|
||||
stmmac_set_desc_sarc(priv, first, priv->sarc_type);
|
||||
|
||||
skb_tx_timestamp(skb);
|
||||
if (!priv->hwts_tx_en)
|
||||
skb_tx_timestamp(skb);
|
||||
|
||||
/* Ready to fill the first descriptor and set the OWN bit w/o any
|
||||
* problems because all the descriptors are actually ready to be
|
||||
|
|
@ -4066,6 +4072,18 @@ static int stmmac_set_mac_address(struct net_device *ndev, void *addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static u16 stmmac_tx_select_queue(struct net_device *dev,
|
||||
struct sk_buff *skb,
|
||||
struct net_device *sb_dev)
|
||||
{
|
||||
struct stmmac_priv *priv = netdev_priv(dev);
|
||||
|
||||
if (likely(priv->plat->tx_select_queue))
|
||||
return priv->plat->tx_select_queue(dev, skb, sb_dev);
|
||||
|
||||
return netdev_pick_tx(dev, skb, NULL) % dev->real_num_tx_queues;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DEBUG_FS
|
||||
static struct dentry *stmmac_fs_dir;
|
||||
|
||||
|
|
@ -4348,13 +4366,13 @@ static const struct net_device_ops stmmac_netdev_ops = {
|
|||
.ndo_tx_timeout = stmmac_tx_timeout,
|
||||
.ndo_do_ioctl = stmmac_ioctl,
|
||||
.ndo_setup_tc = stmmac_setup_tc,
|
||||
.ndo_select_queue = stmmac_select_queue,
|
||||
#ifdef CONFIG_NET_POLL_CONTROLLER
|
||||
.ndo_poll_controller = stmmac_poll_controller,
|
||||
#endif
|
||||
.ndo_set_mac_address = stmmac_set_mac_address,
|
||||
.ndo_vlan_rx_add_vid = stmmac_vlan_rx_add_vid,
|
||||
.ndo_vlan_rx_kill_vid = stmmac_vlan_rx_kill_vid,
|
||||
.ndo_select_queue = stmmac_tx_select_queue,
|
||||
};
|
||||
|
||||
static void stmmac_reset_subtask(struct stmmac_priv *priv)
|
||||
|
|
|
|||
|
|
@ -597,6 +597,12 @@ stmmac_probe_config_dt(struct platform_device *pdev, const char **mac)
|
|||
dev_dbg(&pdev->dev, "PTP rate %d\n", plat->clk_ptp_rate);
|
||||
}
|
||||
|
||||
of_property_read_u32(np,
|
||||
"snps,ptp-ref-clk-rate", &plat->clk_ptp_rate);
|
||||
|
||||
of_property_read_u32(np,
|
||||
"snps,ptp-req-clk-rate", &plat->clk_ptp_req_rate);
|
||||
|
||||
plat->stmmac_rst = devm_reset_control_get(&pdev->dev,
|
||||
STMMAC_RESOURCE_NAME);
|
||||
if (IS_ERR(plat->stmmac_rst)) {
|
||||
|
|
|
|||
|
|
@ -59,6 +59,7 @@
|
|||
#define PTP_TCR_SNAPTYPSEL_1 BIT(16)
|
||||
/* Enable MAC address for PTP Frame Filtering */
|
||||
#define PTP_TCR_TSENMACADDR BIT(18)
|
||||
#define PTP_TCR_AV8021ASMEN BIT(28)
|
||||
|
||||
/* SSIR defines */
|
||||
#define PTP_SSIR_SSINC_MASK 0xff
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@
|
|||
#define __STMMAC_PLATFORM_DATA
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/netdevice.h>
|
||||
|
||||
#define MTL_MAX_RX_QUEUES 8
|
||||
#define MTL_MAX_TX_QUEUES 8
|
||||
|
|
@ -168,6 +169,7 @@ struct plat_stmmacenet_data {
|
|||
struct clk *pclk;
|
||||
struct clk *clk_ptp_ref;
|
||||
unsigned int clk_ptp_rate;
|
||||
unsigned int clk_ptp_req_rate;
|
||||
unsigned int clk_ref_rate;
|
||||
s32 ptp_max_adj;
|
||||
struct reset_control *stmmac_rst;
|
||||
|
|
@ -179,5 +181,10 @@ struct plat_stmmacenet_data {
|
|||
int mac_port_sel_speed;
|
||||
bool en_tx_lpi_clockgating;
|
||||
int has_xgmac;
|
||||
u16 (*tx_select_queue)
|
||||
(struct net_device *dev, struct sk_buff *skb,
|
||||
struct net_device *sb_dev);
|
||||
unsigned int (*get_plat_tx_coal_frames)
|
||||
(struct sk_buff *skb);
|
||||
};
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in a new issue