Merge "ARM: dts: msm: add MHI register space info for PCIe on SM8150"

This commit is contained in:
qctecmdr 2021-05-14 10:10:58 -07:00 • committed by Gerrit - the friendly Code Review server
commit 3b2ce6050d
2 changed files with 12 additions and 6 deletions

View file

@ -12,10 +12,12 @@
<0x60001000 0x1000>,
<0x60100000 0x100000>,
<0x60200000 0x100000>,
<0x60300000 0x3d00000>;
<0x60300000 0x3d00000>,
<0x01c06000 0x1000>;
reg-names = "parf", "phy", "dm_core", "elbi",
"iatu", "conf", "io", "bars";
"iatu", "conf", "io", "bars",
"mhi";
#address-cells = <3>;
#size-cells = <2>;
@ -282,10 +284,12 @@
<0x40001000 0x1000>,
<0x40100000 0x100000>,
<0x40200000 0x100000>,
<0x40300000 0x1fd00000>;
<0x40300000 0x1fd00000>,
<0x01c0e000 0x1000>;
reg-names = "parf", "phy", "dm_core", "elbi",
"iatu", "conf", "io", "bars";
"iatu", "conf", "io", "bars",
"mhi";
#address-cells = <3>;
#size-cells = <2>;

View file

@ -50,7 +50,8 @@
<0x60001000 0x1000>,
<0x60100000 0x100000>,
<0x60200000 0x100000>,
<0x60300000 0x3d00000>;
<0x60300000 0x3d00000>,
<0x01c03000 0x1000>;
qcom,pcie-phy-ver = <2110>;
@ -160,7 +161,8 @@
<0x40001000 0x1000>,
<0x40100000 0x100000>,
<0x40200000 0x100000>,
<0x40300000 0x1fd00000>;
<0x40300000 0x1fd00000>,
<0x01c0b000 0x1000>;
qcom,pcie-phy-ver = <2109>;