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interconnect: qcom: Add OSM L3 support on SCSHRIKE
Add Operating State Manager (OSM) L3 interconnect provider support on SCSHRIKE SoCs. Change-Id: I69bd044422520601b121f260ff0cebf07d5a5220 Signed-off-by: Veera Vegivada <vvegivad@codeaurora.org>
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1 changed files with 18 additions and 0 deletions
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@ -113,6 +113,23 @@ static const struct qcom_icc_desc sm8150_icc_osm_l3 = {
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.num_nodes = ARRAY_SIZE(sm8150_osm_l3_nodes),
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};
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DEFINE_QNODE(mas_osm_l3_apps_scshrike, OSM_MASTER_L3_APPS, 1,
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OSM_SLAVE_L3_CLUSTER0, OSM_SLAVE_L3_CLUSTER1,
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OSM_SLAVE_L3_MISC, OSM_SLAVE_L3_GPU);
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static struct qcom_icc_node *scshrike_osm_l3_nodes[] = {
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[MASTER_OSM_L3_APPS] = &mas_osm_l3_apps_scshrike,
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[SLAVE_OSM_L3_CLUSTER0] = &slv_osm_l3_cluster0,
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[SLAVE_OSM_L3_CLUSTER1] = &slv_osm_l3_cluster1,
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[SLAVE_OSM_L3_MISC] = &slv_osm_l3_misc,
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[SLAVE_OSM_L3_GPU] = &slv_osm_l3_gpu,
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};
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static const struct qcom_icc_desc scshrike_icc_osm_l3 = {
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.nodes = scshrike_osm_l3_nodes,
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.num_nodes = ARRAY_SIZE(scshrike_osm_l3_nodes),
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};
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static int qcom_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
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u32 peak_bw, u32 *agg_avg, u32 *agg_peak)
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{
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@ -285,6 +302,7 @@ err:
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static const struct of_device_id osm_l3_of_match[] = {
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{ .compatible = "qcom,sdm845-osm-l3", .data = &sdm845_icc_osm_l3 },
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{ .compatible = "qcom,sm8150-osm-l3", .data = &sm8150_icc_osm_l3 },
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{ .compatible = "qcom,scshrike-osm-l3", .data = &scshrike_icc_osm_l3 },
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{ }
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};
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MODULE_DEVICE_TABLE(of, osm_l3_of_match);
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