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ARM: dts: msm: enable qsync along with VRR in shima target
This change enables qsync support for shima target along
with exisiting VRR. The required concurrency changes
are already included in the commit 30b1dd339b ("disp:
msm: sde: support qsync and vrr in same atomic commit").
Change-Id: I699334dc999857a8938bcb84d2ac4ca1386252c2
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@ -78,6 +78,7 @@
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qcom,mdss-dsi-min-refresh-rate = <48>;
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qcom,mdss-dsi-max-refresh-rate = <120>;
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qcom,mdss-dsi-pan-fps-update = "dfps_immediate_porch_mode_vfp";
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qcom,mdss-dsi-qsync-min-refresh-rate = <48>;
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qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0",
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"src_byte_clk0", "src_pixel_clk0",
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"shadow_byte_clk0", "shadow_pixel_clk0";
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