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Filename Latest commit message Latest commit date
Yashwanth 42e3759b29 ARM: dts: msm: enable qsync along with VRR in shima target
This change enables qsync support for shima target along
with exisiting VRR. The required concurrency changes
are already included in the commit 30b1dd339b ("disp:
msm: sde: support qsync and vrr in same atomic commit").

Change-Id: I699334dc999857a8938bcb84d2ac4ca1386252c2
2020-10-21 14:20:00 +05:30
bindings dt-bindings: update dynamic clock switch feature nodes 2020-09-12 10:07:33 -07:00
display ARM: dts: msm: enable qsync along with VRR in shima target 2020-10-21 14:20:00 +05:30