msm: kgsl: Move ringbuffer start to target specific code

Currently the ringbuffer start sequence is a mix between generic and
target specific code (and some target specific behavior mixed into the
generic for good measure).  Move all the behavior to the target specific
code which duplicates a bit of code but increases our flexibility for
the future.

Change-Id: Ic0dedbadf0aa9c2af8acfde481f2b62d991f8c1e
Signed-off-by: Jordan Crouse <[email protected]>
This commit is contained in:
Jordan Crouse 2020-01-29 13:11:31 -07:00
commit 468361c1a9
6 changed files with 38 additions and 38 deletions

View file

@ -2118,7 +2118,7 @@ static int _adreno_start(struct adreno_device *adreno_dev)
/* Clear FSR here in case it is set from a previous pagefault */
kgsl_mmu_clear_fsr(&device->mmu);
status = adreno_ringbuffer_start(adreno_dev);
status = gpudev->rb_start(adreno_dev);
if (status)
goto error_oob_clear;
@ -2780,12 +2780,9 @@ static int adreno_soft_reset(struct kgsl_device *device)
/* stop all ringbuffers to cancel RB events */
adreno_ringbuffer_stop(adreno_dev);
/*
* If we have offsets for the jump tables we can try to do a warm start,
* otherwise do a full ringbuffer restart
*/
ret = adreno_ringbuffer_start(adreno_dev);
/* Start the ringbuffer(s) again */
ret = gpudev->rb_start(adreno_dev);
if (ret == 0) {
device->reset_counter++;
set_bit(ADRENO_DEVICE_STARTED, &adreno_dev->priv);

View file

@ -605,6 +605,11 @@ static int a3xx_rb_start(struct adreno_device *adreno_dev)
struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
struct adreno_ringbuffer *rb = ADRENO_CURRENT_RINGBUFFER(adreno_dev);
memset(rb->buffer_desc->hostptr, 0xaa, KGSL_RB_SIZE);
rb->wptr = 0;
rb->_wptr = 0;
rb->wptr_preempt_end = ~0;
/*
* The size of the ringbuffer in the hardware is the log2
* representation of the size in quadwords (sizedwords / 2).

View file

@ -1813,11 +1813,24 @@ static int a5xx_send_me_init(struct adreno_device *adreno_dev,
*/
static int a5xx_rb_start(struct adreno_device *adreno_dev)
{
struct adreno_ringbuffer *rb = ADRENO_CURRENT_RINGBUFFER(adreno_dev);
struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
struct adreno_ringbuffer *rb;
uint64_t addr;
int ret;
int ret, i;
/* Clear all the ringbuffers */
FOR_EACH_RINGBUFFER(adreno_dev, rb, i) {
memset(rb->buffer_desc->hostptr, 0xaa, KGSL_RB_SIZE);
kgsl_sharedmem_writel(device->scratch,
SCRATCH_RPTR_OFFSET(rb->id), 0);
rb->wptr = 0;
rb->_wptr = 0;
rb->wptr_preempt_end = ~0;
}
/* Set up the current ringbuffer */
rb = ADRENO_CURRENT_RINGBUFFER(adreno_dev);
addr = SCRATCH_RPTR_GPU_ADDR(device, rb->id);
kgsl_regwrite(device, A5XX_CP_RB_RPTR_ADDR_LO, lower_32_bits(addr));

View file

@ -855,13 +855,26 @@ static int a6xx_post_start(struct adreno_device *adreno_dev)
*/
static int a6xx_rb_start(struct adreno_device *adreno_dev)
{
struct adreno_ringbuffer *rb = ADRENO_CURRENT_RINGBUFFER(adreno_dev);
struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
struct adreno_ringbuffer *rb;
uint64_t addr;
int ret;
int ret, i;
/* Clear all the ringbuffers */
FOR_EACH_RINGBUFFER(adreno_dev, rb, i) {
memset(rb->buffer_desc->hostptr, 0xaa, KGSL_RB_SIZE);
kgsl_sharedmem_writel(device->scratch,
SCRATCH_RPTR_OFFSET(rb->id), 0);
rb->wptr = 0;
rb->_wptr = 0;
rb->wptr_preempt_end = ~0;
}
a6xx_preemption_start(adreno_dev);
/* Set up the current ringbuffer */
rb = ADRENO_CURRENT_RINGBUFFER(adreno_dev);
addr = SCRATCH_RPTR_GPU_ADDR(device, rb->id);
kgsl_regwrite(device, A6XX_CP_RB_RPTR_ADDR_LO, lower_32_bits(addr));

View file

@ -217,32 +217,6 @@ unsigned int *adreno_ringbuffer_allocspace(struct adreno_ringbuffer *rb,
return ERR_PTR(-ENOSPC);
}
/**
* adreno_ringbuffer_start() - Ringbuffer start
* @adreno_dev: Pointer to adreno device
*/
int adreno_ringbuffer_start(struct adreno_device *adreno_dev)
{
struct adreno_gpudev *gpudev = ADRENO_GPU_DEVICE(adreno_dev);
struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
struct adreno_ringbuffer *rb;
int i;
/* Setup the ringbuffers state before we start */
FOR_EACH_RINGBUFFER(adreno_dev, rb, i) {
memset(rb->buffer_desc->hostptr, 0xaa, KGSL_RB_SIZE);
if (!adreno_is_a3xx(adreno_dev))
kgsl_sharedmem_writel(device->scratch,
SCRATCH_RPTR_OFFSET(rb->id), 0);
rb->wptr = 0;
rb->_wptr = 0;
rb->wptr_preempt_end = 0xFFFFFFFF;
}
/* start is specific GPU rb */
return gpudev->rb_start(adreno_dev);
}
void adreno_ringbuffer_stop(struct adreno_device *adreno_dev)
{
struct adreno_ringbuffer *rb;

View file

@ -151,8 +151,6 @@ int adreno_ringbuffer_submitcmd(struct adreno_device *adreno_dev,
int adreno_ringbuffer_init(struct adreno_device *adreno_dev);
int adreno_ringbuffer_start(struct adreno_device *adreno_dev);
void adreno_ringbuffer_stop(struct adreno_device *adreno_dev);
void adreno_ringbuffer_close(struct adreno_device *adreno_dev);