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clk: qcom: clk-alpha-pll: Fix zonda set_rate failure when PLL is disabled

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Currently, clk_zonda_pll_set_rate polls for the PLL to lock even if the
PLL is disabled. However, if the PLL is disabled then LOCK_DET will
never assert and we'll return an error. There is no reason to poll
LOCK_DET if the PLL is already disabled, so skip polling in this case.

Change-Id: Iaea6460f3be58e1591ff49e025017b2c0b7e20ef
Signed-off-by: Mike Tipton <mdtipton@codeaurora.org>
This commit is contained in:
Mike Tipton 2020-01-27 22:36:34 -08:00
commit 4e0ef92ec7
1 changed files with 4 additions and 1 deletions
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5
drivers/clk/qcom/clk-alpha-pll.c
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2015-2016, 2018-2019, The Linux Foundation.
* Copyright (c) 2015-2016, 2018-2020, The Linux Foundation.
* All rights reserved.
*/
@ -1187,6 +1187,9 @@ static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long rate,
regmap_write(pll->clkr.regmap, PLL_ALPHA_VAL(pll), a);
regmap_write(pll->clkr.regmap, PLL_L_VAL(pll), l);
if (!clk_hw_is_enabled(hw))
return 0;
/* Wait before polling for the frequency latch */
udelay(5);