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ARM: dts: msm: Add NPU-DDR devfreq nodes to SA8155

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Add NPU-DDR device tree nodes for devfreq support on
target SA8155.

Change-Id: I95f71ec7bd77dc7935571f96a70fcec030f1ec15
This commit is contained in:
Shreyas K K 2021-01-06 11:29:40 +05:30
commit 52b8ab20bb
1 changed files with 19 additions and 0 deletions
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19
qcom/sm8150.dtsi
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@ -882,6 +882,25 @@
};
};
npu_npu_ddr_bw: qcom,npu-npu-ddr-bw {
compatible = "qcom,devfreq-icc-ddr";
governor = "performance";
interconnects = <&compute_noc MASTER_NPU &mc_virt SLAVE_EBI1>;
operating-points-v2 = <&ddr_bw_opp_table>;
qcom,active-only;
};
npu_npu_ddr_bwmon: qcom,npu-npu-ddr-bwmon@9960300 {
compatible = "qcom,bimc-bwmon4";
reg = <0x9960300 0x300>, <0x9960200 0x200>;
reg-names = "base", "global_base";
interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>;
qcom,mport = <0>;
qcom,hw-timer-hz = <19200000>;
qcom,target-dev = <&npu_npu_ddr_bw>;
qcom,count-unit = <0x10000>;
};
cpu_pmu: cpu-pmu {
compatible = "arm,armv8-pmuv3";
qcom,irq-is-percpu;