mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-14 08:36:12 -04:00
dt-bindings: interconnect: add OSM L3 bindings
Add bindings for the new interconnect OSM L3 driver. Change-Id: Ib240d9e8d900539fc6f8112c9fe55d530d51ae95
This commit is contained in:
parent
57b0841f8f
commit
5b6a3044ee
1 changed files with 25 additions and 0 deletions
25
bindings/interconnect/qcom,osm-l3.txt
Normal file
25
bindings/interconnect/qcom,osm-l3.txt
Normal file
|
|
@ -0,0 +1,25 @@
|
|||
Qualcomm Technologies, Inc. EPSS L3 interconnect driver binding
|
||||
-----------------------------------------------------------
|
||||
|
||||
The EPSS L3 Interconnect provider supports the scaling of L3 cache
|
||||
performance states of the CPU subsystem.
|
||||
|
||||
Required properties :
|
||||
- compatible : shall contain only one of the following:
|
||||
"qcom,sdm845-osm-l3",
|
||||
"qcom,sm8150-osm-l3";
|
||||
- reg : Address and length of the register set for the device
|
||||
- clock-names: should contain "xo", "alternate"
|
||||
- clocks: list of phandle and clock specifier pairs corresponding to
|
||||
entries in the clock-names property.
|
||||
- #interconnect-cells : should contain 1
|
||||
|
||||
Examples:
|
||||
|
||||
osm_l3: interconnect@0x18321000 {
|
||||
reg = <0x18321000 0x1400>;
|
||||
compatible = "qcom,sm8150-osm-l3";
|
||||
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
|
||||
clock-names = "xo", "alternate";
|
||||
#interconnect-cells = <1>;
|
||||
};
|
||||
Loading…
Reference in a new issue