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ARM: dts: msm: Add bus interconnect property for cdsp

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Update cdsp node with interconnect property.

Change-Id: I122824187dd6cfe4dc490604be3ad24b64b4414c
This commit is contained in:
Mukesh Ojha 2020-06-08 18:10:20 +05:30 • committed by Gerrit - the friendly Code Review server
commit 5c5dda42da
1 changed files with 2 additions and 0 deletions
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2
qcom/shima.dtsi
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@ -1510,6 +1510,8 @@
memory-region = <&pil_cdsp_mem>;
qcom,complete-ramdump;
interconnects = <&nsp_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>;
/* Inputs from turing */
interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
<&cdsp_smp2p_in 0 0>,