A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-28 18:51:56 -04:00
Code Issues Projects Releases Packages Wiki Activity

ARM: dts: msm: Correct BAM register address on olympic

Browse source 
This change will correct the UART nodes BAM base register address
on olympic platform.

Change-Id: Ib5819fea7c1201ae06bc72b8f080c40f286f5017
This commit is contained in:
Chandana Kishori Chiluveru 2020-11-11 18:30:39 +05:30
commit 5d0e0faf2a
1 changed files with 7 additions and 7 deletions
Download patch file Download diff file Expand all files Collapse all files

14
qcom/sdxlemur-blsp.dtsi
View file

@ -294,7 +294,7 @@
compatible = "qcom,msm-hsuart-v14";
reg-names = "core_mem", "bam_mem";
reg = <0x82f000 0x200>,
<0x80400 0x23000>;
<0x804000 0x23000>;
interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
#address-cells = <0>;
interrupt-parent = <&blsp1_uart1a_hs>;
@ -330,7 +330,7 @@
compatible = "qcom,msm-hsuart-v14";
reg-names = "core_mem", "bam_mem";
reg = <0x82f000 0x200>,
<0x80400 0x23000>;
<0x804000 0x23000>;
interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
#address-cells = <0>;
interrupt-parent = <&blsp1_uart1b_hs>;
@ -366,7 +366,7 @@
compatible = "qcom,msm-hsuart-v14";
reg-names = "core_mem", "bam_mem";
reg = <0x830000 0x200>,
<0x80400 0x23000>;
<0x804000 0x23000>;
interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
#address-cells = <0>;
interrupt-parent = <&blsp1_uart2a_hs>;
@ -402,7 +402,7 @@
compatible = "qcom,msm-hsuart-v14";
reg-names = "core_mem", "bam_mem";
reg = <0x830000 0x200>,
<0x80400 0x23000>;
<0x804000 0x23000>;
interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
#address-cells = <0>;
interrupt-parent = <&blsp1_uart2b_hs>;
@ -438,7 +438,7 @@
compatible = "qcom,msm-hsuart-v14";
reg-names = "core_mem", "bam_mem";
reg = <0x831000 0x200>,
<0x80400 0x23000>;
<0x804000 0x23000>;
interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
#address-cells = <0>;
interrupt-parent = <&blsp1_uart3_hs>;
@ -474,7 +474,7 @@
compatible = "qcom,msm-hsuart-v14";
reg-names = "core_mem", "bam_mem";
reg = <0x832000 0x200>,
<0x80400 0x23000>;
<0x804000 0x23000>;
interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
#address-cells = <0>;
interrupt-parent = <&blsp1_uart4a_hs>;
@ -510,7 +510,7 @@
compatible = "qcom,msm-hsuart-v14";
reg-names = "core_mem", "bam_mem";
reg = <0x832000 0x200>,
<0x80400 0x23000>;
<0x804000 0x23000>;
interrupt-names = "core_irq", "bam_irq", "wakeup_irq";
#address-cells = <0>;
interrupt-parent = <&blsp1_uart4b_hs>;