ARM: dts: msm: Add LLCC for sdxlemur

Added entry for LLCC in sdxlemur tree.

Change-Id: I84bffd2e554a1e4065fcf89098281bc996d42a56
This commit is contained in:
Melody Olvera 2020-08-14 09:39:35 -07:00
commit 5ec4e5b567

View file

@ -432,6 +432,15 @@
#hwlock-cells = <1>;
};
cache-controller@9200000 {
compatible = "qcom,sdxlemur-llcc", "qcom,llcc-v2";
reg = <0x9200000 0x50000>;
reg-names = "llcc_base";
cap-based-alloc-and-pwr-collapse;
clocks = <&aopcc QDSS_CLK>;
clock-names = "aopcc_closks";
};
smem: qcom,smem {
compatible = "qcom,smem";
memory-region = <&smem_mem>;