mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-07 12:25:00 -04:00
Merge "usb: phy: qmp: Perform DP_COM_SW_RESET during portselect"
This commit is contained in:
commit
5f7d6431db
1 changed files with 14 additions and 6 deletions
|
|
@ -1,6 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2013-2019, The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2013-2020, The Linux Foundation. All rights reserved.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
|
|
@ -17,6 +17,8 @@
|
|||
#include <linux/clk.h>
|
||||
#include <linux/extcon.h>
|
||||
#include <linux/reset.h>
|
||||
#include <linux/pinctrl/devinfo.h>
|
||||
#include <linux/pinctrl/consumer.h>
|
||||
|
||||
enum core_ldo_levels {
|
||||
CORE_LEVEL_NONE = 0,
|
||||
|
|
@ -380,6 +382,17 @@ static void usb_qmp_update_portselect_phymode(struct msm_ssphy_qmp *phy)
|
|||
|
||||
switch (phy->phy_type) {
|
||||
case USB3_AND_DP:
|
||||
if (phy->phy.dev->pins) {
|
||||
writel_relaxed(0x01,
|
||||
phy->base + phy->phy_reg[USB3_DP_COM_SW_RESET]);
|
||||
|
||||
pinctrl_select_state(phy->phy.dev->pins->p,
|
||||
phy->phy.dev->pins->default_state);
|
||||
|
||||
writel_relaxed(0x00,
|
||||
phy->base + phy->phy_reg[USB3_DP_COM_SW_RESET]);
|
||||
}
|
||||
|
||||
/* override hardware control for reset of qmp phy */
|
||||
writel_relaxed(SW_DPPHY_RESET_MUX | SW_DPPHY_RESET |
|
||||
SW_USB3PHY_RESET_MUX | SW_USB3PHY_RESET,
|
||||
|
|
@ -489,11 +502,6 @@ static int msm_ssphy_qmp_init(struct usb_phy *uphy)
|
|||
return ret;
|
||||
}
|
||||
|
||||
/* perform software reset of PHY common logic */
|
||||
if (phy->phy_type == USB3_AND_DP)
|
||||
writel_relaxed(0x00,
|
||||
phy->base + phy->phy_reg[USB3_DP_COM_SW_RESET]);
|
||||
|
||||
/* perform software reset of PCS/Serdes */
|
||||
writel_relaxed(0x00, phy->base + phy->phy_reg[USB3_PHY_SW_RESET]);
|
||||
/* start PCS/Serdes to operation mode */
|
||||
|
|
|
|||
Loading…
Reference in a new issue