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mmi_pl_chg: clear pmic limit after remove pd power
the pmic current would be limit when 45w pd charger connect, and must clear the pmic limit setting after PD power removed. Change-Id: I814e2825ca29c0975542bda0dcc72f6571ea437a Signed-off-by: xuwt2 <xuwt2@lenovo.com> Reviewed-on: https://gerrit.mot.com/1439744 SLTApproved: Slta Waiver SME-Granted: SME Approvals Granted Tested-by: Jira Key Reviewed-by: Jianqi Yang <yangj@motorola.com> Submit-Approved: Jira Key Reviewed-on: https://gerrit.mot.com/1893582 Reviewed-by: Wei Xu <xuwei9@lenovo.com> Reviewed-by: Xiangpo Zhao <zhaoxp3@motorola.com>
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2 changed files with 4 additions and 0 deletions
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@ -941,6 +941,7 @@ static void cancel_sm(struct mmi_charger_manager *chip)
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{
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cancel_delayed_work_sync(&chip->mmi_chrg_sm_work);
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flush_delayed_work(&chip->mmi_chrg_sm_work);
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mmi_chrg_policy_clear(chip);
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chip->sm_work_running = false;
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mmi_chrg_dbg(chip, PR_INTERRUPT,
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"cancel sync and flush mmi chrg sm work\n");
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@ -293,9 +293,12 @@ static void chrg_policy_error_recovery(struct mmi_charger_manager *chip,
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#define PD_CONT_PWR_CNT 5
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void mmi_chrg_policy_clear(struct mmi_charger_manager *chip) {
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struct mmi_cp_policy_dev *chrg_list = &g_chrg_list;
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chrg_dev_init(chip, &g_chrg_list);
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clear_chrg_dev_error_cnt(chip, &g_chrg_list);;
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clear_chg_manager(chip);
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mmi_set_charing_current(chrg_list->chrg_dev[PMIC_SW],
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DISABLE_CHRG_LIMIT);
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sm_state = PM_STATE_DISCONNECT;
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chip->pps_volt_comp = PPS_INIT_VOLT_COMP;
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quit_slave_chrg_cnt = 0;
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