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tundra: Modify the register according to Qcom patch
details: 1.refer to Qcom patch for modification,modify two registers 2.slove the signal interference problem Change-Id: I24158814dc56f6ef021b86ff384a589118cc08b4 Signed-off-by: yangmf3 <yangmf3@motorola.com> Reviewed-on: https://gerrit.mot.com/2301431 SME-Granted: SME Approvals Granted SLTApproved: Slta Waiver Tested-by: Jira Key Reviewed-by: Shuo Wang <wangsh18@motorola.com> Reviewed-by: <huqian4@motorola.com> Reviewed-by: Long Cheng <chengl1@motorola.com> Reviewed-by: <liuzy55@motorola.com> Reviewed-by: Zhichao Chen <chenzc2@motorola.com> Submit-Approved: Jira Key
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1 changed files with 30 additions and 0 deletions
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@ -376,12 +376,22 @@ struct data_rate_settings_t data_rate_delta_table_1_2_3 = {
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{
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.lane_identifier = CPHY_LANE_0,
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.csiphy_data_rate_regs = {
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#ifdef CONFIG_CAM_CTLE_ENABLE
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{0x144, 0xB2, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#else
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{0x144, 0xA2, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#endif
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{0x988, 0x05, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#ifdef CONFIG_CAM_CTLE_ENABLE
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{0x980, 0x60, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#else
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{0x980, 0x61, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#endif
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{0x9B4, 0x08, 0x0A,
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CSIPHY_DEFAULT_PARAMS},
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},
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@ -389,12 +399,22 @@ struct data_rate_settings_t data_rate_delta_table_1_2_3 = {
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{
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.lane_identifier = CPHY_LANE_1,
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.csiphy_data_rate_regs = {
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#ifdef CONFIG_CAM_CTLE_ENABLE
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{0x344, 0xB2, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#else
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{0x344, 0xA2, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#endif
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{0xA88, 0x05, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#ifdef CONFIG_CAM_CTLE_ENABLE
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{0xA80, 0x60, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#else
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{0xA80, 0x61, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#endif
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{0xAB4, 0x08, 0x0A,
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CSIPHY_DEFAULT_PARAMS},
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},
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@ -402,12 +422,22 @@ struct data_rate_settings_t data_rate_delta_table_1_2_3 = {
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{
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.lane_identifier = CPHY_LANE_2,
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.csiphy_data_rate_regs = {
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#ifdef CONFIG_CAM_CTLE_ENABLE
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{0x544, 0xB2, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#else
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{0x544, 0xA2, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#endif
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{0xB88, 0x05, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#ifdef CONFIG_CAM_CTLE_ENABLE
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{0xB80, 0x60, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#else
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{0xB80, 0x61, 0x00,
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CSIPHY_DEFAULT_PARAMS},
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#endif
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{0xBB4, 0x08, 0x0A,
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CSIPHY_DEFAULT_PARAMS},
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},
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