ARM: dts: msm: Add support for SCM PAS

The PIL drivers need to vote for bandwidth across DDR and
crypto subsytem, such that the secure world can perform
initialization and authorization of the firmware blobs.
Hence add a device-tree node indicating the corresponding
interconnect.

Change-Id: If5626ad20638434e39a7d4aa0f02149a72bdaf12
This commit is contained in:
Raghavendra Rao Ananta 2019-07-26 09:19:47 -07:00
commit 66b82d2ac5

View file

@ -556,6 +556,11 @@
#interconnect-cells = <1>;
};
pil_scm_pas {
compatible = "qcom,pil-tz-scm-pas";
interconnects = <&aggre2_noc MASTER_CRYPTO &mc_virt SLAVE_EBI1>;
};
ufsphy_mem: ufsphy_mem@1d87000 {
reg = <0x1d8700 0xe10>;
reg-names = "phy_mem";