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pinctrl: qcom: Correctly configure the SDC2 pins
When the commit <9c6fe1f3cb> (pinctrl: qcom: Expose ufs_reset as
gpio on Lahaina) tried to reconfigure the pins, it missed to setup the
PINCTRL_PIN() entries for the same. Hence, reorder the pin numbers for
proper functionality of the pins.
Change-Id: Ia48156a7b0b86fc9ccaa1ddabbac7d5e1a04f37b
Signed-off-by: Raghavendra Rao Ananta <rananta@codeaurora.org>
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parent
df1e8abb32
commit
68cc5a6bd2
1 changed files with 5 additions and 5 deletions
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@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2019, The Linux Foundation. All rights reserved.
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* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
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*/
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#include <linux/module.h>
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@ -328,10 +328,10 @@ static const struct pinctrl_pin_desc lahaina_pins[] = {
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PINCTRL_PIN(200, "GPIO_200"),
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PINCTRL_PIN(201, "GPIO_201"),
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PINCTRL_PIN(202, "GPIO_202"),
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PINCTRL_PIN(203, "SDC2_CLK"),
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PINCTRL_PIN(204, "SDC2_CMD"),
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PINCTRL_PIN(205, "SDC2_DATA"),
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PINCTRL_PIN(206, "UFS_RESET"),
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PINCTRL_PIN(203, "UFS_RESET"),
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PINCTRL_PIN(204, "SDC2_CLK"),
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PINCTRL_PIN(205, "SDC2_CMD"),
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PINCTRL_PIN(206, "SDC2_DATA"),
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};
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#define DECLARE_MSM_GPIO_PINS(pin) \
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