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ARM: dts: msm: Fix DDR OPP table entries

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DDR OPP table entries were missing the opp-supported-hw
property. Add the missing property.

Change-Id: I46608517649ef5620ab7e5f4f8933989368de169
This commit is contained in:
Saurabh Ambulkar 2021-04-19 17:11:34 +05:30 • committed by Gerrit - the friendly Code Review server
commit 6a9695b87e
1 changed files with 10 additions and 10 deletions
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20
qcom/sm6150.dtsi
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@ -593,16 +593,16 @@
ddr_bw_opp_table: ddr-bw-opp-table {
compatible = "operating-points-v2";
BW_OPP_ENTRY( 200, 4); /* 762 MB/s */
BW_OPP_ENTRY( 300, 4); /* 1144 MB/s */
BW_OPP_ENTRY( 451, 4); /* 1720 MB/s */
BW_OPP_ENTRY( 547, 4); /* 2086 MB/s */
BW_OPP_ENTRY( 681, 4); /* 2597 MB/s */
BW_OPP_ENTRY( 768, 4); /* 2929 MB/s */
BW_OPP_ENTRY(1017, 4); /* 3879 MB/s */
BW_OPP_ENTRY(1353, 4); /* 5161 MB/s */
BW_OPP_ENTRY(1555, 4); /* 5931 MB/s */
BW_OPP_ENTRY(1804, 4); /* 6881 MB/s */
BW_OPP_ENTRY_DDR( 200, 4, 0x80); /* 762 MB/s */
BW_OPP_ENTRY_DDR( 300, 4, 0x80); /* 1144 MB/s */
BW_OPP_ENTRY_DDR( 451, 4, 0x80); /* 1720 MB/s */
BW_OPP_ENTRY_DDR( 547, 4, 0x80); /* 2086 MB/s */
BW_OPP_ENTRY_DDR( 681, 4, 0x80); /* 2597 MB/s */
BW_OPP_ENTRY_DDR( 768, 4, 0x80); /* 2929 MB/s */
BW_OPP_ENTRY_DDR(1017, 4, 0x80); /* 3879 MB/s */
BW_OPP_ENTRY_DDR(1353, 4, 0x80); /* 5161 MB/s */
BW_OPP_ENTRY_DDR(1555, 4, 0x80); /* 5931 MB/s */
BW_OPP_ENTRY_DDR(1804, 4, 0x80); /* 6881 MB/s */
};
cpu_llcc_ddr_bw: qcom,cpu-llcc-ddr-bw {