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Merge "qcacmn: WAR for RXDMA packet drop issue"

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Linux Build Service Account 2017-07-16 15:52:24 -07:00 • committed by Gerrit - the friendly Code Review server
commit 6e5563fc0f
2 changed files with 26 additions and 6 deletions
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24
dp/wifi3.0/dp_rx_err.c
View file

@ -956,6 +956,8 @@ dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
uint32_t msdu_cnt;
uint32_t i;
bool mpdu_err;
uint8_t push_reason;
uint8_t rxdma_error_code = 0;
msdu = 0;
@ -964,6 +966,13 @@ dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
&p_last_buf_addr_info, &msdu_cnt, &mpdu_err);
push_reason =
hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
rxdma_error_code =
hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
}
do {
rx_msdu_link_desc =
dp_rx_cookie_2_link_desc_va(soc, &buf_info);
@ -977,11 +986,11 @@ dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
msdu_cnt -= num_msdus;
for (i = 0; i < num_msdus; i++) {
struct dp_rx_desc *rx_desc =
dp_rx_cookie_2_va_rxdma_buf(soc,
msdu_list.sw_cookie[i]);
if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
for (i = 0; i < num_msdus; i++) {
struct dp_rx_desc *rx_desc =
dp_rx_cookie_2_va_rxdma_buf(soc,
msdu_list.sw_cookie[i]);
qdf_assert(rx_desc);
msdu = rx_desc->nbuf;
@ -997,6 +1006,9 @@ dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
rx_bufs_used++;
dp_rx_add_to_free_desc_list(head,
tail, rx_desc);
}
} else {
rxdma_error_code = HAL_RXDMA_ERR_WAR;
}
hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
@ -1007,6 +1019,8 @@ dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
} while (buf_info.paddr && msdu_cnt);
DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
return rx_bufs_used;
}

8
dp/wifi3.0/hal_rx.h
View file

@ -1658,6 +1658,10 @@ struct hal_buf_info {
uint32_t sw_cookie;
};
/* This special cookie value will be used to indicate FW allocated buffers
* received through RXDMA2SW ring for RXDMA WARs */
#define HAL_RX_COOKIE_SPECIAL 0x1fffff
/**
* hal_rx_msdu_link_desc_get(): API to get the MSDU information
* from the MSDU link descriptor
@ -1820,6 +1824,7 @@ enum hal_reo_error_code {
* @ HAL_RXDMA_ERR_DA_TIMEOUT : Destination Address search timeout
* @ HAL_RXDMA_ERR_FLOW_TIMEOUT : Flow Search Timeout
* @ HAL_RXDMA_ERR_FLUSH_REQUEST : RxDMA FIFO Flush request
* @ HAL_RXDMA_ERR_WAR : RxDMA WAR dummy errors
*/
enum hal_rxdma_error_code {
HAL_RXDMA_ERR_OVERFLOW = 0,
@ -1835,7 +1840,8 @@ enum hal_rxdma_error_code {
HAL_RXDMA_ERR_SA_TIMEOUT,
HAL_RXDMA_ERR_DA_TIMEOUT,
HAL_RXDMA_ERR_FLOW_TIMEOUT,
HAL_RXDMA_ERR_FLUSH_REQUEST
HAL_RXDMA_ERR_FLUSH_REQUEST,
HAL_RXDMA_ERR_WAR = 31
};
/**