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ARM: dts: msm: Add correct cti config to tmc etr/etf for lahaina

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Add correct cti config for the tmc etr/etf reset cti trigin and cti flush
trigout.

Change-Id: I54088b890d24799a040f0951e41e98be0cc393a6
This commit is contained in:
Mao Jinlong 2020-08-11 10:43:09 +08:00
commit 77b9ca9416
1 changed files with 2 additions and 1 deletions
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3
qcom/lahaina-coresight.dtsi
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@ -107,6 +107,7 @@
coresight-name = "coresight-tmc-etf";
coresight-csr = <&swao_csr>;
coresight-ctis = <&cti0_swao &cti3_swao>;
clocks = <&clock_aop QDSS_CLK>;
clock-names = "apb_pclk";
@ -153,7 +154,7 @@
qcom,sw-usb;
coresight-name = "coresight-tmc-etr";
coresight-ctis = <&cti0 &cti0>;
coresight-ctis = <&cti0 &cti3_swao>;
coresight-csr = <&csr>;
clocks = <&clock_aop QDSS_CLK>;