A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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ARM: dts: msm: Set refclock base address for sdxnightjar

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This change adds refclock base address and sets the clock scheme to cml.
Also make major_rev of the phy to 1 and disable susphy for controller
during phy initialization as recommended in controller data book.

Change-Id: Idb293c7fe67c0c37ec85f7807ba487685af2a461
This commit is contained in:
Pratham Pratap 2023-08-08 11:49:08 +05:30 • committed by Prashanth K
commit 77fa5c31ca
1 changed files with 7 additions and 2 deletions
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9
qcom/sdxnightjar-usb.dtsi
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@ -68,6 +68,7 @@
snps,usb2-gadget-lpm-disable;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
snps,dis_u2_susphy_quirk;
xhci-imod-value = <4000>;
maximum-speed = "super-speed";
dr_mode = "otg";
@ -106,8 +107,10 @@
qusb_phy: qusb@79000 {
compatible = "qcom,qusb2phy";
reg = <0x00079000 0x180>;
reg-names = "qusb_phy_base";
reg = <0x00079000 0x180>,
<0x01841030 0x4>;
reg-names = "qusb_phy_base",
"ref_clk_addr";
vdd-supply = <&pmd9650_l4>;
vdda18-supply = <&pmd9650_l5>;
vdda33-supply = <&pmd9650_l10>;
@ -123,6 +126,8 @@
0x9f 0x1c
0x00 0x18>;
phy_type = "utmi";
qcom,phy-clk-scheme = "cml";
qcom,major-rev = <1>;
USB3_GDSC-supply = <&gdsc_usb30>;
qcom,secure-level-shifter;