A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-10 22:40:54 -04:00
Code Issues Projects Releases Packages Wiki Activity

cpufreq: qcom: Set the register for GT Limits Management interrupt

Browse source 
Set the GT_IRQ_CLR bit of EPSS_INTR_CLEAR register to generate the EPSS
hardware GT interrupt when LMH throttle occurs.

Change-Id: I1ba6faf1a28f2d8d06c8d91f3046bb064263cb67
Signed-off-by: Naveen Yadav <naveenky@codeaurora.org>
This commit is contained in:
Naveen Yadav 2020-06-02 09:21:02 +05:30
commit 7a0971c78d
1 changed files with 2 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

2
drivers/cpufreq/qcom-cpufreq-hw.c
View file

@ -317,6 +317,8 @@ static int qcom_cpufreq_hw_cpu_init(struct cpufreq_policy *policy)
}
c->is_irq_requested = true;
writel_relaxed(GT_IRQ_STATUS, c->base + offsets[REG_INTR_EN]);
writel_relaxed(0x0, c->base + offsets[REG_INTR_CLR]);
c->is_irq_enabled = true;
c->freq_limit_attr.attr.name = "dcvsh_freq_limit";
c->freq_limit_attr.show = dcvsh_freq_limit_show;