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ASoC: cs35l41: Use same frame sync for ASP RX/TX

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Distortion can occur if the RX and TX paths do not use the same
frame sync signal.  This forces the FS1 and FS2 signals to
use the same frame sync signal and also ensures common sample
rates between the RX and TX paths.

SQA-1135

Mot-Crs-fixed:(CR)

Change-Id: Id7f1dbbcca6247f0ad22b631fc6d499fc7e9827b
Signed-off-by: Adam Brickman <Adam.Brickman@cirrus.com>
Reviewed-on: https://gerrit.mot.com/1253047
SLTApproved: Slta Waiver
SME-Granted: SME Approvals Granted
Tested-by: Jira Key
Reviewed-by: Guobin Zhang <zhanggb@motorola.com>
Submit-Approved: Jira Key
Reviewed-on: https://gerrit.mot.com/1253077
Reviewed-by: Rav(CR) Vembu <raviv@motorola.com>
Reviewed-by: Yuesheng Huang <huangys@motorola.com>
This commit is contained in:
Adam Brickman 2018-09-25 16:36:56 -05:00 • committed by Yuesheng Huang
commit 7c64e606ae
2 changed files with 6 additions and 0 deletions
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4
sound/soc/codecs/cs35l41.c
View file

@ -1735,6 +1735,7 @@ static const struct reg_sequence cs35l41_reva0_errata_patch[] = {
{0x00000040, 0x00005555},
{0x00000040, 0x0000AAAA},
{0x00003854, 0x05180240},
{CS35L41_VIMON_SPKMON_RESYNC, 0x00000000},
{CS35L41_OTP_TRIM_30, 0x9091A1C8},
{0x00003014, 0x0200EE0E},
{CS35L41_BSTCVRT_DCM_CTRL, 0x00000051},
@ -1743,6 +1744,7 @@ static const struct reg_sequence cs35l41_reva0_errata_patch[] = {
{CS35L41_IRQ2_DB3, 0x00000000},
{CS35L41_DSP1_YM_ACCEL_PL0_PRI, 0x00000000},
{CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000},
{CS35L41_ASP_CONTROL4, 0x00000000},
{0x00000040, 0x0000CCCC},
{0x00000040, 0x00003333},
};
@ -1750,9 +1752,11 @@ static const struct reg_sequence cs35l41_reva0_errata_patch[] = {
static const struct reg_sequence cs35l41_revb0_errata_patch[] = {
{0x00000040, 0x00005555},
{0x00000040, 0x0000AAAA},
{CS35L41_VIMON_SPKMON_RESYNC, 0x00000000},
{CS35L41_BSTCVRT_DCM_CTRL, 0x00000051},
{CS35L41_DSP1_YM_ACCEL_PL0_PRI, 0x00000000},
{CS35L41_DSP1_XM_ACCEL_PL0_PRI, 0x00000000},
{CS35L41_ASP_CONTROL4, 0x00000000},
{0x00000040, 0x0000CCCC},
{0x00000040, 0x00003333},
};

2
sound/soc/codecs/cs35l41.h
View file

@ -71,6 +71,7 @@
#define CS35L41_BSTCVRT_DCM_MODE_FORCE 0x00003820
#define CS35L41_BSTCVRT_OVERVOLT_CTRL 0x00003830
#define CS35L41_VI_VOL_POL 0x00004000
#define CS35L41_VIMON_SPKMON_RESYNC 0x00004100
#define CS35L41_DTEMP_WARN_THLD 0x00004220
#define CS35L41_DTEMP_CFG 0x00004224
#define CS35L41_DTEMP_EN 0x00004308
@ -83,6 +84,7 @@
#define CS35L41_SP_FRAME_RX_SLOT 0x00004820
#define CS35L41_SP_TX_WL 0x00004830
#define CS35L41_SP_RX_WL 0x00004840
#define CS35L41_ASP_CONTROL4 0x00004854
#define CS35L41_DAC_PCM1_SRC 0x00004C00
#define CS35L41_ASP_TX1_SRC 0x00004C20
#define CS35L41_ASP_TX2_SRC 0x00004C24