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https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-10 22:40:54 -04:00
Merge "cnss2: Save PCIe GEN speed and width changed from device"
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commit
832413cfd4
1 changed files with 28 additions and 0 deletions
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@ -1116,16 +1116,20 @@ static int cnss_pci_set_mhi_state(struct cnss_pci_data *pci_priv,
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ret = 0;
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break;
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case CNSS_MHI_SUSPEND:
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mutex_lock(&pci_priv->mhi_ctrl->pm_mutex);
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if (pci_priv->drv_connected_last)
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ret = mhi_pm_fast_suspend(pci_priv->mhi_ctrl, true);
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else
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ret = mhi_pm_suspend(pci_priv->mhi_ctrl);
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mutex_unlock(&pci_priv->mhi_ctrl->pm_mutex);
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break;
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case CNSS_MHI_RESUME:
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mutex_lock(&pci_priv->mhi_ctrl->pm_mutex);
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if (pci_priv->drv_connected_last)
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ret = mhi_pm_fast_resume(pci_priv->mhi_ctrl, true);
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else
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ret = mhi_pm_resume(pci_priv->mhi_ctrl);
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mutex_unlock(&pci_priv->mhi_ctrl->pm_mutex);
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break;
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case CNSS_MHI_TRIGGER_RDDM:
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ret = mhi_force_rddm_mode(pci_priv->mhi_ctrl);
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@ -4262,6 +4266,29 @@ static int cnss_pci_update_fw_name(struct cnss_pci_data *pci_priv)
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return 0;
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}
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static int cnss_mhi_bw_scale(struct mhi_controller *mhi_ctrl,
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struct mhi_link_info *link_info)
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{
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struct cnss_pci_data *pci_priv = mhi_ctrl->priv_data;
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int ret = 0;
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ret = msm_pcie_set_link_bandwidth(pci_priv->pci_dev,
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link_info->target_link_speed,
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link_info->target_link_width);
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if (ret)
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return ret;
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pci_priv->def_link_speed = link_info->target_link_speed;
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pci_priv->def_link_width = link_info->target_link_width;
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cnss_pr_dbg("Setting link speed:0x%x, width:0x%x\n",
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link_info->target_link_speed,
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link_info->target_link_width);
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return 0;
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}
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static int cnss_pci_register_mhi(struct cnss_pci_data *pci_priv)
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{
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int ret = 0;
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@ -4310,6 +4337,7 @@ static int cnss_pci_register_mhi(struct cnss_pci_data *pci_priv)
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mhi_ctrl->status_cb = cnss_mhi_notify_status;
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mhi_ctrl->runtime_get = cnss_mhi_pm_runtime_get;
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mhi_ctrl->runtime_put = cnss_mhi_pm_runtime_put_noidle;
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mhi_ctrl->bw_scale = cnss_mhi_bw_scale;
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mhi_ctrl->rddm_size = pci_priv->plat_priv->ramdump_info_v2.ramdump_size;
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mhi_ctrl->sbl_size = SZ_512K;
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