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ARM: dts: msm: Fix clock handles in sensor DTs for shima

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Fix camcc clock names in sensor dt nodes for shima.

CRs-Fixed: 2732811
Change-Id: I101eb98754adaa954a310d4dbb84d9f5fcca75a8
This commit is contained in:
Shravan Nevatia 2020-07-20 02:59:18 +05:30
commit 8f0ed7f0a1
2 changed files with 16 additions and 16 deletions
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16
shima-camera-sensor-idp.dtsi
View file

@ -89,7 +89,7 @@
"CAM_RESET0";
cci-master = <0>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clocks = <&camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -124,7 +124,7 @@
"CAM_RESET1";
cci-master = <1>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clocks = <&camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -167,7 +167,7 @@
"CAM_RESET0";
cci-master = <0>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clocks = <&camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -209,7 +209,7 @@
"CAM_RESET1";
cci-master = <1>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clocks = <&camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -258,7 +258,7 @@
"CAM_RESET2";
cci-master = <0>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clocks = <&camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -292,7 +292,7 @@
"CAM_RESET3";
cci-master = <1>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clocks = <&camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -334,7 +334,7 @@
"CAM_RESET2";
cci-master = <0>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clocks = <&camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -374,7 +374,7 @@
"CAM_RESET3";
cci-master = <1>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clocks = <&camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;

16
shima-camera-sensor-idps.dtsi
View file

@ -89,7 +89,7 @@
"CAM_RESET0";
cci-master = <0>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clocks = <&camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -124,7 +124,7 @@
"CAM_RESET1";
cci-master = <1>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clocks = <&camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -167,7 +167,7 @@
"CAM_RESET0";
cci-master = <0>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
clocks = <&camcc CAM_CC_MCLK0_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -209,7 +209,7 @@
"CAM_RESET1";
cci-master = <1>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK1_CLK>;
clocks = <&camcc CAM_CC_MCLK1_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -258,7 +258,7 @@
"CAM_RESET2";
cci-master = <0>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clocks = <&camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -292,7 +292,7 @@
"CAM_RESET3";
cci-master = <1>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clocks = <&camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -334,7 +334,7 @@
"CAM_RESET2";
cci-master = <0>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK2_CLK>;
clocks = <&camcc CAM_CC_MCLK2_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;
@ -374,7 +374,7 @@
"CAM_RESET3";
cci-master = <1>;
status = "ok"
clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
clocks = <&camcc CAM_CC_MCLK3_CLK>;
clock-names = "cam_clk";
clock-cntl-level = "nominal";
clock-rates = <24000000>;