Merge tag 'LA.UM.9.14.r1-21000-LAHAINA.QSSI13.0' into android13-5.4-lahaina

* tag 'LA.UM.9.14.r1-21000-LAHAINA.QSSI13.0':
  ARM: dts: msm: adding wdi client scaling exceptions
  ARM: dts: qcom: Set PCIe Wr halt to 1GB and disable BDF halt for sdxlemur
  ARM: dts: msm: CPU changes for katmai target
  ARM: dts: qcom: Set PCIe Wr halt to 1GB and disable BDF halt for sdxlemur
  ARM: dts: msm: Add cpu related changes for Katmai targets
  ARM: dts: msm: change WLAN IOVA address
  ARM: dts: qcom: Set PCIe Wr halt window size to 1GB for sdxlemur
  ARM: dts: msm: Increase R8125 ring size
  ARM: dts: msm: add display config support for katmai FP2
  ARM: dts: msm: Add 738MHz GPU speed bins support for SM8325
  ARM: dts: qcom: Enable PCIe halt feature on sdxlemur
  ARM: dts: msm: cnss: Update DDR/SNOC voting values
  ARM: dts: msm: Disable csid2 & vfe2 nodes
  ARM: dts: msm: add display config support for katmai
  ARM: dts: msm: Add cpu related changes for Katmai FP2 targets
  ARM: dts: qcom: add calibrated batt_therm channel for yupik
  ARM: dts: qcom: Update cpu voltage cooling device node
  dt-bindings: thermal: Update CPU voltage cooling device bindings
  ARM: dts: msm: Reduce IPA AB DDR vote value for LOW SVS corner
  ARM: dts: qcom: Add support to disable PCIe halt Wr and Rd
  ARM: dts: msm: Add support for 700Mhz GPU FMAX for yupik
  ARM: dts: msm: set default panel for yupik iot qrd
  ARM: dts: msm: Disable csid2 & vfe2 nodes
  ARM: dts: qcom: Add new soc-id for Blair
  ARM: dts: msm: Add additional thermal zones for sdr pa sensors
  ARM: dts: msm: Add support of FMAX 700mhz for blair GPU
  dt-bindings: thermal: Add support for new SDR pa thermistors
  ARM: dts: msm: Disable PCIe1 nodes for katmai fp1 variant
  ARM: dts: qcom: Add changes for 2x pine with 5G and 6G radio
  ARM: dts: msm: Add GPU pwrlevels for Katmai target
  ARM: dts: msm: Add cpu related changes for Katmai targets
  ARM: dts: msm: Add support for Katmai targets
  ARM: dts: msm: add rtl based flag
  ARM: dts: msm: Add dtsi entry for dual pine
  ARM: dts: msm: Add additional v2 variant for sdxlemur board
  ARM: dts: msm: Updating right DDR AB/IB voting values
  ARM: dts: msm: Update the LLC node AB value without modem
  ARM: dts: qcom: Add EP reset post link-up flag for pine
  ARM: dts: msm: switch qdss usb to sw path
  ARM: dts: msm: Disable ipa from wlan side for blair apq
  ARM: dts: msm: Updating right AB/IB vote as per new frequency plan
  ARM: dts: qcom: Change modem Tj thresholds for sdxlemur
  ARM: dts: qcom: Settings for change calculation of FoM for preset
  ARM: dts: msm: disable IPA entry for blair APQ targets
  ARM: dts: qcom: Add apq variant device tree support to Blair
  ARM: dts: msm: Add appropriate dtsi file for SDX+Pine Target
  ARM: dts: qcom: Fix board_id for QCN9000 in SDXLEMUR
  ARM: dts: qcom: Add of version register to figure out ntn3 version
  ARM: dts: msm: Ignore SSR failure for wpss
  ARM: dts: msm: updating modem_tj mitigation for LAHAINA
  ARM: dts: qcom: Add modem mitigation for bcl violation in lahaina
  ARM: dts: msm: Add support of 608Mhz GPU FMAX for yupik
  ARM: dts: msm: Add skin and mmw thermal config for YUPIK
  ARM: dts: msm: Update board-id for PM7250B
  ARM: dts: msm: Remove SDPM and policy-engine support for YUPIK
  ARM: dts: msm: Update Ibat threshold and BCL thermal config for YUPIK
  ARM: dts: msm: Add skin, modem and junction thermal config for YUPIK
  ARM: dts: msm: Add gpu-model property for yupik gpu
  ARM: dts: msm: Add CX and MX SDPM configuration for YUPIK
  ARM: dts: qcom: Enable CPU frequency cooling device for YUPIK
  Revert "ARM: dts: msm: Add CX and MX SDPM configuration for YUPIK"
  ARM: dts: msm: Enable L1SS sleep for p-v2.1
  ARM: dts: msm: Update PCIe0 PHY settings to v1.00 for p v2.1
  ARM: dts: msm: Add switch control GPIO for WLAN
  ARM: dts: qcom: Update CPU and GPU mitigation rules on Lahaina HHG
  ARM: dts: msm: Enable two_pass_use_wfi quirk for yupik GPU
  ARM: dts: msm: Enable touch support on lahaina MTP 2.1
  ARM: dts: msm: Add proxy vote on display regulators on yupik
  ARM: dts: msm: update wsa node for yupik qrd audio
  ARM: dts: msm: Add Additional speed bins for supported devices
  Fixing space issue to avoid diff with mainline
  ARM: dts: qcom: enable suspend for Lahaina HHG
  ARM: dts: msm: Add camera device tree inclusions for lahaina hhg
  ARM: dts: qcom: change ldo for fan controller on Lahaina HHG
  ARM: dts: msm: Vote vccq2 via vccq to support GKI
  ARM: dts: msm: Disable haptics for yupik atp
  ARM: dts: msm: Add camera device tree inclusions for Yupik camera
  Revert "ARM: dts: msm: Add camera device tree inclusions for Yupik camera"
  ARM: dts: msm: remove kgsl smmu interconnect node for Lahaina
  Revert "ARM: dts: msm: Use PCIe_MSI for Shima"
  ARM: dts: msm: Add support for SM8325 platforms
  ARM: dts: qcom: use separate thermal zone names for modem pa for shima
  ARM: dts: msm: Add cpu7 qos latfloor device on shima
  ARM: dts: msm: Add L3 snoop bw device on Lahaina
  dt-bindings: Update bindings for guestvm-loader
  ARM: dts: msm: add new properties to guestvm node
  ARM: dts: msm: Change micbias no for VA DMIC for shima
  ARM: dts: msm: Add new GPU DCVS corners for Shima
  ARM: dts: msm: Disable atmel_mxt_ts
  ARM: dts: msm: Remove display clock as client for CX SDPM for SHIMA
  ARM: dts: msm: Add a new power level for supported devices
  ARM: dts: msm: Enable touch for Dual DSI video mode on shima
  Revert "ARM: dts: msm: enable mem_offline.bypass_send_msg for shima"
  Revert "Revert "ARM: dts: msm: Add CX and MX SDPM configuration for SHIMA""
  Revert "ARM: dts: msm: Add CX and MX SDPM configuration for SHIMA"
  ARM: dts: msm: Enable qcom,power-always-on for GPU SMMUs on GKI targets
  dt-bindings: Document the qcom,power-always-on property for SMMU devices
  Revert "ARM: dts: msm: add trusted touch support in PVM for Lahaina"
  ARM: dts: msm: add trusted touch support in PVM for Lahaina
  ARM: dts: msm: Update masks in codec Fs clock sequence
  Revert "ARM: dts: msm: Use PCIe_MSI for Shima"
  ARM: dts: qcom: Update skin and cx thermal mitigation config for SHIMA
  ARM: dts: msm: Add cnss-enable-self-recovery flag for shima
  ARM: dts: msm: enable mem_offline.bypass_send_msg for shima
  Revert "ARM: dts: qcom: disable panic on single corruption"
  Revert "ARM: dts: msm: Vote for DDR BW for MPSS PIL on Lahaina"
  Revert "ARM: dts: msm: Update CNSS node for BT GPIO config"
  Revert "ARM: dts: msm: add WL_EN entry in BT node"
  Revert "ARM: dts: msm: Add 144 fps touch support on shima target"
  Revert "ARM: dts: msm: Add device tree for Shima IDP/IDPS with 120fps platform"
  Revert "ARM: dts: msm: Select 120Hz panel as default on 120Hz shima dts"
  Revert "ARM: dts: msm: enable mem_offline.bypass_send_msg for shima"
  Revert "ARM: dts: msm: add change to support gsi wdi polling"
  ARM: dts: msm: add change to support gsi wdi polling
  ARM: dts: msm: add WL_EN entry in BT node
  ARM: dts: msm: Update CNSS node for BT GPIO config
  ARM: dts: msm: Vote for DDR BW for MPSS PIL on Lahaina
  ARM: dts: qcom: disable panic on single corruption
  ARM: dts: msm: enable mem_offline.bypass_send_msg for shima
  ARM: dts: msm: Select 120Hz panel as default on 120Hz shima dts
  ARM: dts: msm: Add 144 fps touch support on shima target
  ARM: dts: msm: Add device tree for Shima IDP/IDPS with 120fps platform

Change-Id: Idbc222d0860c0558cb4d0c56c7b3498f5d676b57
This commit is contained in:
Michael Bestas 2023-06-08 12:27:56 +03:00
commit 95f7f8fe83
No known key found for this signature in database
GPG key ID: CC95044519BE6669
110 changed files with 1709 additions and 73 deletions

View file

@ -104,6 +104,9 @@ SoCs:
- BLAIR
compatible = "qcom,blair"
- BLAIRP
compatible = "qcom,blairp"
- MONACO
compatible = "qcom,monaco"
@ -300,6 +303,10 @@ compatible = "qcom,blair-mtp"
compatible = "qcom,blair-cdp"
compatible = "qcom,blair-atp"
compatible = "qcom,blair-qrd"
compatible = "qcom,blairp-mtp"
compatible = "qcom,blairp-cdp"
compatible = "qcom,blairp-atp"
compatible = "qcom,blairp-qrd"
compatible = "qcom,scuba-idp"
compatible = "qcom,monaco-rumi"
compatible = "qcom,monaco"

View file

@ -54,6 +54,8 @@ Optional properties:
load in uA and Regulator settle delay in us
- qcom,smmu-s1-enable: Boolean property to decide whether to enable SMMU
S1 stage or not
- wlan-ipa-disabled: Boolean property to decide whether IPA is disabled
or not
- qcom,wlan-smmu-iova-address: I/O virtual address range as <start length>
format to be used for allocations associated
between WLAN/PCIe and SMMU

View file

@ -407,12 +407,24 @@ interconnects:
Usage: optional
Value type: <u32 array of bdfs>
Definition: Skip enumeration for the list of 32-bit BDFs.
- qcom,config-recovery:
Usage: optional
Value type : <bool>
Definition: Enable to notify the client driver for recovery when
config space is not accessible
- qcom, pcie-halt-feature-dis:
Usage: optional
Value type : <bool>
Definition: Disable PCIe Write and Read halt feature
- qcom, qcom,bdf-halt-dis:
Usage: optional
Value type : <bool>
Definition: Disables the BDF halt feature which halt inbound
write transactions when BDF change is detected.
==============
Root port node
==============
@ -629,6 +641,17 @@ i2c child node
Value Type: Array of <u32>
Definition: List of slave registers to dump by i2c read
- version-reg:
Usage: optional
Value type: <u32>
Definition: Register to find ntn3 switch version
- force-i2c-setting:
Usage: optional
Value type: <bool>
Definition: If force-i2c-setting flag is set
then de_emphasis settings are updated
irrespective of the chip version via i2c_writes
=======
Example
=======
@ -641,5 +664,7 @@ Example
ep-reset-reg = <0x801210>;
ep-reset-gpio-mask = <0xf>;
dump-regs = <0x801330 0x801350 0x801370>;
version-reg = <0x800000>;
force-i2c-setting;
};
};

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@ -92,6 +92,17 @@ Subsystem properties:
59. mmw2
60. mmw3
61. mmw_ific0
62. rf_cal
63. qfe_wtr_pa4
64. qfe_wtr_pa5
65. qfe_wtr_pa6
66. qfe_wtr_pa4_fr1
67. qfe_wtr_pa5_fr1
68. qfe_wtr_pa6_fr1
69. qfe_ret_pa1
70. qfe_ret_pa1_fr1
71. sdr0_pa
72. sdr1_pa
Example:

View file

@ -15,11 +15,24 @@ Required Parameters:
driver.
voltage cooling device node properties:
-qcom,cpus:
- apc1_cluster: thermal-cluster-a-b
Usage: required
Definition : CPU voltage cooling device node name. where 'a' is the
1st core of 1st cluster and 'b' is 1st core of 2nd cluster.
-qcom,cluster0:
Usage: required
Value type: An array of CPU phandle
Definition: Specify array of 2 CPU phandles, which needs to be
used for building a voltage based mitigation table.
Definition: Specify array of CPU phandles available in 1st cluster,
which needs to be used for building a voltage based mitigation
table.
-qcom,cluster1:
Usage: required
Value type: An array of CPU phandle
Definition: Specify array of CPU phandles available in 2nd cluster,
which needs to be used for building a voltage based mitigation
table.
-#cooling-cells:
Usage: required
@ -35,8 +48,9 @@ Optional Parameters:
Example:
qcom,cpu-voltage-cdev {
compatible = "qcom,cc-cooling-devices";
apc1_cluster: qcom,apc1-cluster {
qcom,cpus = <&CPU4 &CPU7>;
apc1_cluster: thermal-cluster-4-7 {
qcom,cluster0 = <&CPU4 &CPU5 &CPU6>;
qcom,cluster1 = <&CPU7>;
#cooling-cells = <2>;
};
};

View file

@ -150,7 +150,14 @@ dtbo-$(CONFIG_ARCH_BLAIR) += blair-rumi-overlay.dtbo \
blair-qrd-overlay.dtbo \
blair-mtp-usbc-overlay.dtbo \
blair-mtp-nopmi-overlay.dtbo \
blair-qrd-nopmi-overlay.dtbo
blair-qrd-nopmi-overlay.dtbo \
blairp-mtp-overlay.dtbo \
blairp-cdp-overlay.dtbo \
blairp-atp-overlay.dtbo \
blairp-qrd-overlay.dtbo \
blairp-mtp-usbc-overlay.dtbo \
blairp-mtp-nopmi-overlay.dtbo \
blairp-qrd-nopmi-overlay.dtbo
blair-rumi-overlay.dtbo-base := blair.dtb
blair-mtp-overlay.dtbo-base := blair.dtb
@ -160,6 +167,13 @@ blair-qrd-overlay.dtbo-base := blair.dtb
blair-mtp-usbc-overlay.dtbo-base := blair.dtb
blair-mtp-nopmi-overlay.dtbo-base := blair.dtb
blair-qrd-nopmi-overlay.dtbo-base := blair.dtb
blairp-mtp-overlay.dtbo-base := blairp.dtb
blairp-cdp-overlay.dtbo-base := blairp.dtb
blairp-atp-overlay.dtbo-base := blairp.dtb
blairp-qrd-overlay.dtbo-base := blairp.dtb
blairp-mtp-usbc-overlay.dtbo-base := blairp.dtb
blairp-mtp-nopmi-overlay.dtbo-base := blairp.dtb
blairp-qrd-nopmi-overlay.dtbo-base := blairp.dtb
else
dtb-$(CONFIG_ARCH_BLAIR) += blair-rumi.dtb \
blair-mtp.dtb \
@ -168,7 +182,14 @@ dtb-$(CONFIG_ARCH_BLAIR) += blair-rumi.dtb \
blair-qrd.dtb \
blair-mtp-usbc.dtb \
blair-mtp-nopmi.dtb \
blair-qrd-nopmi.dtb
blair-qrd-nopmi.dtb \
blairp-mtp.dtb \
blairp-cdp.dtb \
blairp-atp.dtb \
blairp-qrd.dtb \
blairp-mtp-usbc.dtb \
blairp-mtp-nopmi.dtb \
blairp-qrd-nopmi.dtb
endif
ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)
@ -217,12 +238,20 @@ dtbo-$(CONFIG_ARCH_YUPIK) += \
yupik-iot-qrd-overlay.dtbo \
yupik-iot-hsp-overlay.dtbo \
yupik-iot-hsp-pm7250b-overlay.dtbo \
katmai-hsp-overlay.dtbo \
katmai-hsp-pm7250b-overlay.dtbo \
katmai-fp2-hsp-overlay.dtbo \
katmai-fp2-hsp-pm7250b-overlay.dtbo \
yupik-iot-idps-amoled-overlay.dtbo \
yupikp-iot-idp-overlay.dtbo \
yupikp-iot-idp-pm7250b-overlay.dtbo \
yupikp-iot-qrd-overlay.dtbo \
yupikp-iot-hsp-overlay.dtbo \
yupikp-iot-hsp-pm7250b-overlay.dtbo \
katmaip-hsp-overlay.dtbo \
katmaip-hsp-pm7250b-overlay.dtbo \
katmaip-fp2-hsp-overlay.dtbo \
katmaip-fp2-hsp-pm7250b-overlay.dtbo \
yupikp-iot-idps-amoled-overlay.dtbo
@ -238,18 +267,26 @@ yupikp-atp-overlay.dtbo-base := yupikp.dtb
yupikp-qrd-overlay.dtbo-base := yupikp.dtb
yupikp-idps-amoled-overlay.dtbo-base := yupikp.dtb
yupikp-idp-hsp-overlay.dtbo-base := yupikp-hsp.dtb
yupik-iot-idp-overlay.dtbo-base := yupik-iot.dtb
yupik-iot-idp-pm7250b-overlay.dtbo-base := yupik-iot.dtb
yupik-iot-qrd-overlay.dtbo-base := yupik-iot.dtb
yupik-iot-idp-overlay.dtbo-base := yupik-iot.dtb katmai.dtb katmai-fp2.dtb
yupik-iot-idp-pm7250b-overlay.dtbo-base := yupik-iot.dtb katmai.dtb katmai-fp2.dtb
yupik-iot-qrd-overlay.dtbo-base := yupik-iot.dtb katmai.dtb katmai-fp2.dtb
yupik-iot-hsp-overlay.dtbo-base := yupik-iot.dtb
yupik-iot-hsp-pm7250b-overlay.dtbo-base := yupik-iot.dtb
yupik-iot-idps-amoled-overlay.dtbo-base := yupik-iot.dtb
yupikp-iot-idp-overlay.dtbo-base := yupikp-iot.dtb
yupikp-iot-idp-pm7250b-overlay.dtbo-base := yupikp-iot.dtb
yupikp-iot-qrd-overlay.dtbo-base := yupikp-iot.dtb
katmai-hsp-overlay.dtbo-base := katmai.dtb
katmai-hsp-pm7250b-overlay.dtbo-base := katmai.dtb
katmai-fp2-hsp-overlay.dtbo-base := katmai-fp2.dtb
katmai-fp2-hsp-pm7250b-overlay.dtbo-base := katmai-fp2.dtb
yupik-iot-idps-amoled-overlay.dtbo-base := yupik-iot.dtb katmai.dtb katmai-fp2.dtb
yupikp-iot-idp-overlay.dtbo-base := yupikp-iot.dtb katmaip.dtb katmaip-fp2.dtb
yupikp-iot-idp-pm7250b-overlay.dtbo-base := yupikp-iot.dtb katmaip.dtb katmaip-fp2.dtb
yupikp-iot-qrd-overlay.dtbo-base := yupikp-iot.dtb katmaip.dtb katmaip-fp2.dtb
yupikp-iot-hsp-overlay.dtbo-base := yupikp-iot.dtb
yupikp-iot-hsp-pm7250b-overlay.dtbo-base := yupikp-iot.dtb
yupikp-iot-idps-amoled-overlay.dtbo-base := yupikp-iot.dtb
katmaip-hsp-overlay.dtbo-base := katmaip.dtb
katmaip-hsp-pm7250b-overlay.dtbo-base := katmaip.dtb
katmaip-fp2-hsp-overlay.dtbo-base := katmaip-fp2.dtb
katmaip-fp2-hsp-pm7250b-overlay.dtbo-base := katmaip-fp2.dtb
yupikp-iot-idps-amoled-overlay.dtbo-base := yupikp-iot.dtb katmaip.dtb katmaip-fp2.dtb
else
dtb-$(CONFIG_ARCH_YUPIK) += yupik-rumi.dtb \
yupik-idp.dtb \
@ -274,7 +311,19 @@ dtb-$(CONFIG_ARCH_YUPIK) += yupik-rumi.dtb \
yupikp-iot-hsp.dtb \
yupik-iot-hsp-pm7250b.dtb \
yupikp-iot-hsp-pm7250b.dtb \
yupikp-iot-idps-amoled.dtb
yupikp-iot-idps-amoled.dtb \
katmai-idp.dtb \
katmai-idp-pm7250b.dtb \
katmai-qrd.dtb \
katmai-hsp.dtb \
katmai-idps-amoled.dtb \
katmaip-idp.dtb \
katmaip-idp-pm7250b.dtb \
katmaip-qrd.dtb \
katmaip-hsp.dtb \
katmai-hsp-pm7250b.dtb \
katmaip-hsp-pm7250b.dtb \
katmaip-idps-amoled.dtb
endif
ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)
@ -454,7 +503,8 @@ dtb-$(CONFIG_ARCH_SDXLEMUR) += sdxlemur-rumi.dtb \
sdxlemur-v2-mtp-mbb-m2-ep.dtb \
sdxlemur-v2-rcm-rc-pine1x.dtb \
sdxlemur-v2-rcm-rc-pine2x.dtb \
sdxlemur-v2-m2-ep-fwa.dtb
sdxlemur-v2-m2-ep-fwa.dtb \
sdxlemur-v2-mtp-cpe-pine2x-5+6.dtb

View file

@ -6,7 +6,7 @@
/ {
model = "Qualcomm Technologies, Inc. Blair ATP";
compatible = "qcom,blair-atp", "qcom,blair", "qcom,atp";
qcom,msm-id = <507 0x10000>;
qcom,msm-id = <507 0x10000>, <578 0x10000>;
qcom,board-id = <33 0>;
};

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@ -6,7 +6,7 @@
/ {
model = "Qualcomm Technologies, Inc. Blair CDP";
compatible = "qcom,blair-cdp", "qcom,blair", "qcom,cdp";
qcom,msm-id = <507 0x10000>;
qcom,msm-id = <507 0x10000>, <578 0x10000>;
qcom,board-id = <1 0>;
};

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@ -6,7 +6,7 @@
/ {
model = "Qualcomm Technologies, Inc. Blair MTP NOPMI";
compatible = "qcom,blair-mtp", "qcom,blair", "qcom,mtp";
qcom,msm-id = <507 0x10000>;
qcom,msm-id = <507 0x10000>, <578 0x10000>;
qcom,board-id = <8 0>;
qcom,pmic-id-size = <4>;
qcom,pmic-id = <0x2D 0x0 0x0 0x0>;

View file

@ -7,7 +7,7 @@
/ {
model = "Qualcomm Technologies, Inc. Blair MTP";
compatible = "qcom,blair-mtp", "qcom,blair", "qcom,mtp";
qcom,msm-id = <507 0x10000>;
qcom,msm-id = <507 0x10000>, <578 0x10000>;
qcom,board-id = <8 0>;
qcom,pmic-id-size = <4>;
qcom,pmic-id = <0x2D 0x0 0x2E 0x0>;

View file

@ -7,7 +7,7 @@
/ {
model = "Qualcomm Technologies, Inc. Blair MTP USBC audio";
compatible = "qcom,blair-mtp", "qcom,blair", "qcom,mtp";
qcom,msm-id = <507 0x10000>;
qcom,msm-id = <507 0x10000>, <578 0x10000>;
qcom,board-id = <8 1>;
};

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@ -6,7 +6,7 @@
/ {
model = "Qualcomm Technologies, Inc. Blair QRD NOPMI";
compatible = "qcom,blair-qrd", "qcom,blair", "qcom,qrd";
qcom,msm-id = <507 0x10000>;
qcom,msm-id = <507 0x10000>, <578 0x10000>;
qcom,board-id = <0x1000B 0>;
qcom,pmic-id-size = <4>;
qcom,pmic-id = <0x2D 0x0 0x0 0x0>;

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@ -7,7 +7,7 @@
/ {
model = "Qualcomm Technologies, Inc. Blair QRD";
compatible = "qcom,blair-qrd", "qcom,blair", "qcom,qrd";
qcom,msm-id = <507 0x10000>;
qcom,msm-id = <507 0x10000>, <578 0x10000>;
qcom,board-id = <0x1000B 0>;
qcom,pmic-id-size = <4>;
qcom,pmic-id = <0x2D 0x0 0x2E 0x0>;

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@ -6,6 +6,6 @@
/ {
model = "Qualcomm Technologies, Inc. Blair RUMI";
compatible = "qcom,blair-rumi", "qcom,blair", "qcom,rumi";
qcom,msm-id = <507 0x10000>;
qcom,msm-id = <507 0x10000>, <578 0x10000>;
qcom,board-id = <15 0>;
};

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@ -17,7 +17,7 @@
/ {
model = "Qualcomm Technologies, Inc. Blair ";
compatible = "qcom,blair";
qcom,msm-id = <507 0x10000>;
qcom,msm-id = <507 0x10000>, <578 0x10000>;
interrupt-parent = <&intc>;
#address-cells = <2>;
@ -3684,6 +3684,73 @@
qcom,bus-max-ddr7 = <4>;
};
};
qcom,gpu-pwrlevels-3 {
#address-cells = <1>;
#size-cells = <0>;
qcom,speed-bin = <148>;
qcom,ca-target-pwrlevel = <3>;
qcom,initial-pwrlevel = <4>;
/* NOM_L1 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <700000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
qcom,bus-freq-ddr7 = <9>;
qcom,bus-min-ddr7 = <5>;
qcom,bus-max-ddr7 = <9>;
};
/* NOM */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <650000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,bus-freq-ddr7 = <6>;
qcom,bus-min-ddr7 = <5>;
qcom,bus-max-ddr7 = <8>;
};
/* SVS_L1 */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <490000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
qcom,bus-freq-ddr7 = <5>;
qcom,bus-min-ddr7 = <4>;
qcom,bus-max-ddr7 = <7>;
};
/* SVS */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <390000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
qcom,bus-freq-ddr7 = <4>;
qcom,bus-min-ddr7 = <2>;
qcom,bus-max-ddr7= <5>;
};
/* LOW SVS */
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <266000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
qcom,bus-freq-ddr7 = <2>;
qcom,bus-min-ddr7 = <1>;
qcom,bus-max-ddr7 = <4>;
};
};
};
};

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@ -0,0 +1,44 @@
/dts-v1/;
/plugin/;
#include "blairp-atp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp ATP";
compatible = "qcom,blairp-atp", "qcom,blairp", "qcom,atp";
qcom,msm-id = <565 0x10000>;
qcom,board-id = <33 0>;
};
&wsa881x_i2c_e {
status = "disabled";
};
&wsa881x_i2c_44 {
status = "disabled";
};
&wcd937x_tx_slave {
status = "disabled";
};
&wcd937x_rx_slave {
status = "disabled";
};
&wcd937x_codec {
status = "disabled";
};
&holi_snd {
qcom,wcd-disabled = <1>;
qcom,audio-routing =
"RX_TX DEC0_INP", "TX DEC0 MUX",
"RX_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC2_INP", "TX DEC2 MUX",
"RX_TX DEC3_INP", "TX DEC3 MUX",
"VA SWR_INPUT", "VA_SWR_CLK",
"VA_AIF1 CAP", "VA_SWR_CLK",
"VA_AIF2 CAP", "VA_SWR_CLK",
"VA_AIF3 CAP", "VA_SWR_CLK";
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "blairp.dtsi"
#include "blairp-atp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp ATP";
compatible = "qcom,blairp-atp", "qcom,blairp", "qcom,atp";
qcom,board-id = <33 0>;
};

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@ -0,0 +1 @@
#include "blair-atp.dtsi"

View file

@ -0,0 +1,16 @@
/dts-v1/;
/plugin/;
#include "blairp-cdp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp CDP";
compatible = "qcom,blairp-cdp", "qcom,blairp", "qcom,cdp";
qcom,msm-id = <565 0x10000>;
qcom,board-id = <1 0>;
};
&wsa881x_analog_reset_gpio {
pinctrl-0 = <&spkr_1_sd_n_active>;
pinctrl-1 = <&spkr_1_sd_n_sleep>;
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "blairp.dtsi"
#include "blairp-cdp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp CDP";
compatible = "qcom,blairp-cdp", "qcom,blairp", "qcom,cdp";
qcom,board-id = <1 0>;
};

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@ -0,0 +1 @@
#include "blair-cdp.dtsi"

View file

@ -0,0 +1,14 @@
/dts-v1/;
/plugin/;
#include "blairp-mtp-nopmi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp MTP NOPMI";
compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp";
qcom,msm-id = <565 0x10000>;
qcom,board-id = <8 0>;
qcom,pmic-id-size = <4>;
qcom,pmic-id = <0x2D 0x0 0x0 0x0>;
};

View file

@ -0,0 +1,13 @@
/dts-v1/;
#include "blairp.dtsi"
#include "blairp-mtp-nopmi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp MTP NOPMI";
compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp";
qcom,board-id = <8 0>;
qcom,pmic-id-size = <4>;
qcom,pmic-id = <0x2D 0x0 0x0 0x0>;
};

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@ -0,0 +1,2 @@
#include "blair-mtp-nopmi.dtsi"

View file

@ -0,0 +1,18 @@
/dts-v1/;
/plugin/;
#include "blairp-mtp.dtsi"
#include "holi-mtp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp MTP";
compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp";
qcom,msm-id = <565 0x10000>;
qcom,board-id = <8 0>;
qcom,pmic-id-size = <4>;
qcom,pmic-id = <0x2D 0x0 0x2E 0x0>;
};
&pm7250b_charger {
dpdm-supply = <&usb2_phy0>;
};

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@ -0,0 +1,53 @@
/dts-v1/;
/plugin/;
#include "blairp-mtp-usbc.dtsi"
#include "holi-mtp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp MTP USBC audio";
compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp";
qcom,msm-id = <565 0x10000>;
qcom,board-id = <8 1>;
};
&swr0 {
qcom,is_wcd937x = <0>;
};
&wcd937x_tx_slave {
status = "disabled";
};
&wcd937x_rx_slave {
status = "disabled";
};
&wcd937x_codec {
status = "disabled";
};
&pm7250b_charger {
dpdm-supply = <&usb2_phy0>;
};
&wcd938x_tx_slave {
status = "ok"
};
&wcd938x_rx_slave {
status = "ok"
};
&wcd938x_codec {
status = "ok"
};
&holi_snd {
asoc-codec = <&stub_codec>, <&bolero>,
<&wcd938x_codec>, <&wsa881x_i2c_e>,
<&wsa881x_i2c_f>;
asoc-codec-names = "msm-stub-codec.1", "bolero_codec",
"wcd938x_codec", "wsa-codec0",
"wsa-codec1";
};

View file

@ -0,0 +1,15 @@
/dts-v1/;
#include "blairp.dtsi"
#include "blairp-mtp-usbc.dtsi"
#include "holi-mtp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. BLAIRP MTP USBC audio";
compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp";
qcom,board-id = <8 1>;
};
&pm7250b_charger {
dpdm-supply = <&usb2_phy0>;
};

View file

@ -0,0 +1 @@
#include "blair-mtp-usbc.dtsi"

View file

@ -0,0 +1,17 @@
/dts-v1/;
#include "blairp.dtsi"
#include "blairp-mtp.dtsi"
#include "holi-mtp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp MTP";
compatible = "qcom,blairp-mtp", "qcom,blairp", "qcom,mtp";
qcom,board-id = <8 0>;
qcom,pmic-id-size = <4>;
qcom,pmic-id = <0x2D 0x0 0x2E 0x0>;
};
&pm7250b_charger {
dpdm-supply = <&usb2_phy0>;
};

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@ -0,0 +1 @@
#include "blair-mtp.dtsi"

View file

@ -0,0 +1,14 @@
/dts-v1/;
/plugin/;
#include "blairp-qrd-nopmi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp QRD NOPMI";
compatible = "qcom,blairp-qrd", "qcom,blairp", "qcom,qrd";
qcom,msm-id = <565 0x10000>;
qcom,board-id = <0x1000B 0>;
qcom,pmic-id-size = <4>;
qcom,pmic-id = <0x2D 0x0 0x0 0x0>;
};

View file

@ -0,0 +1,13 @@
/dts-v1/;
#include "blairp.dtsi"
#include "blairp-qrd-nopmi.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp QRD NOPMI";
compatible = "qcom,blairp-qrd", "qcom,blairp", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
qcom,pmic-id-size = <4>;
qcom,pmic-id = <0x2D 0x0 0x0 0x0>;
};

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@ -0,0 +1,2 @@
#include "blair-qrd-nopmi.dtsi"

View file

@ -0,0 +1,18 @@
/dts-v1/;
/plugin/;
#include "blairp-qrd.dtsi"
#include "holi-qrd-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp QRD";
compatible = "qcom,blairp-qrd", "qcom,blairp", "qcom,qrd";
qcom,msm-id = <565 0x10000>;
qcom,board-id = <0x1000B 0>;
qcom,pmic-id-size = <4>;
qcom,pmic-id = <0x2D 0x0 0x2E 0x0>;
};
&pm7250b_charger {
dpdm-supply = <&usb2_phy0>;
};

View file

@ -0,0 +1,17 @@
/dts-v1/;
#include "blairp.dtsi"
#include "blairp-qrd.dtsi"
#include "holi-qrd-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp QRD";
compatible = "qcom,blairp-qrd", "qcom,blairp", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
qcom,pmic-id-size = <4>;
qcom,pmic-id = <0x2D 0x0 0x2E 0x0>;
};
&pm7250b_charger {
dpdm-supply = <&usb2_phy0>;
};

View file

@ -0,0 +1 @@
#include "blair-qrd.dtsi"

View file

@ -0,0 +1,9 @@
/dts-v1/;
#include "blairp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp SoC";
compatible = "qcom,blairp";
qcom,board-id = <0 0>;
};

View file

@ -0,0 +1,32 @@
/dts-v1/;
#include "blair.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Blairp SoC";
compatible = "qcom,blairp";
qcom,msm-id = <565 0x10000>;
};
&soc {
qcom,msm_gsi {
status = "disabled";
};
qcom,rmnet-ipa {
status = "disabled";
};
qcom,ipa_fws {
status = "disabled";
};
ipa_hw: qcom,ipa@0x5800000 {
status = "disabled";
};
icnss: qcom,icnss@C800000 {
wlan-ipa-disabled;
};
};

View file

@ -158,6 +158,7 @@
<&gpi_dma0 1 2 3 64 0>;
dma-names = "tx", "rx";
qcom,wrapper-core = <&qupv3_0>;
qcom,rtl_se;
status = "disabled";
};
@ -241,6 +242,7 @@
<&gpi_dma1 1 0 3 64 0>;
dma-names = "tx", "rx";
qcom,wrapper-core = <&qupv3_1>;
qcom,rtl_se;
status = "disabled";
};
@ -283,6 +285,7 @@
<&gpi_dma1 1 1 3 64 0>;
dma-names = "tx", "rx";
qcom,wrapper-core = <&qupv3_1>;
qcom,rtl_se;
status = "disabled";
};
@ -303,6 +306,7 @@
<&gpi_dma1 1 2 3 64 0>;
dma-names = "tx", "rx";
qcom,wrapper-core = <&qupv3_1>;
qcom,rtl_se;
status = "disabled";
};

View file

@ -0,0 +1,278 @@
/ {
/delete-node/ cpus;
// /delete-node/ energy-costs;
cpus {
#address-cells = <2>;
#size-cells = <0>;
CPU0: cpu@0 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x0>;
enable-method = "psci";
cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
next-level-cache = <&L2_0>;
#cooling-cells = <2>;
L2_0: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
L3_0: l2-cache {
compatible = "arm,arch-cache";
cache-level = <3>;
};
};
};
CPU1: cpu@100 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x100>;
enable-method = "psci";
cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU2: cpu@200 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x200>;
enable-method = "psci";
cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
next-level-cache = <&L2_2>;
L2_2: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU3: cpu@300 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x300>;
enable-method = "psci";
cpu-idle-states = <&SLVR_OFF &SLVR_RAIL_OFF>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
qcom,freq-domain = <&cpufreq_hw 0 4>;
next-level-cache = <&L2_3>;
L2_3: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU4: cpu@400 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x400>;
enable-method = "psci";
cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
capacity-dmips-mhz = <1946>;
dynamic-power-coefficient = <520>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
next-level-cache = <&L2_4>;
#cooling-cells = <2>;
L2_4: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU5: cpu@500 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x500>;
enable-method = "psci";
cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
capacity-dmips-mhz = <1946>;
dynamic-power-coefficient = <520>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
next-level-cache = <&L2_5>;
L2_5: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU6: cpu@600 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x600>;
enable-method = "psci";
cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
capacity-dmips-mhz = <1946>;
dynamic-power-coefficient = <520>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
next-level-cache = <&L2_6>;
L2_6: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
CPU7: cpu@700 {
device_type = "cpu";
compatible = "qcom,kryo";
reg = <0x0 0x700>;
enable-method = "psci";
cpu-idle-states = <&GOLD_OFF &GOLD_RAIL_OFF>;
capacity-dmips-mhz = <1964>;
dynamic-power-coefficient = <520>;
qcom,freq-domain = <&cpufreq_hw 1 4>;
next-level-cache = <&L2_7>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
cache-level = <2>;
next-level-cache = <&L3_0>;
};
};
cpu-map {
cluster0 {
core0 {
cpu = <&CPU0>;
};
core1 {
cpu = <&CPU1>;
};
core2 {
cpu = <&CPU2>;
};
core3 {
cpu = <&CPU3>;
};
};
cluster1 {
core0 {
cpu = <&CPU4>;
};
core1 {
cpu = <&CPU5>;
};
core2 {
cpu = <&CPU6>;
};
core3 {
cpu = <&CPU7>;
};
};
};
};
};
&soc {
qcom,cpu0-cpugrp {
qcom,cpu4-cpu-llcc-latmon {
qcom,core-dev-table =
< 691200 MHZ_TO_MBPS( 300, 16) >,
< 940800 MHZ_TO_MBPS( 466, 16) >,
< 1228800 MHZ_TO_MBPS( 600, 16) >,
< 1651200 MHZ_TO_MBPS( 806, 16) >;
};
qcom,cpu4-llcc-ddr-latmon {
ddr4-map {
qcom,core-dev-table =
< 691200 MHZ_TO_MBPS( 451, 4) >,
< 940800 MHZ_TO_MBPS( 547, 4) >,
< 1228800 MHZ_TO_MBPS(1017, 4) >,
< 1651200 MHZ_TO_MBPS(1555, 4) >;
};
ddr5-map {
qcom,core-dev-table =
< 691200 MHZ_TO_MBPS( 451, 4) >,
< 940800 MHZ_TO_MBPS( 547, 4) >,
< 1228800 MHZ_TO_MBPS( 768, 4) >,
< 1651200 MHZ_TO_MBPS(1555, 4) >,
< 1900800 MHZ_TO_MBPS(1708, 4) >;
};
};
qcom,cpu4-computemon {
/delete-property/ qcom,cpulist;
qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>;
ddr4-map {
qcom,core-dev-table =
< 691200 MHZ_TO_MBPS( 451, 4) >,
< 1228800 MHZ_TO_MBPS( 547, 4) >,
< 1516800 MHZ_TO_MBPS( 768, 4) >,
< 1651200 MHZ_TO_MBPS(1017, 4) >,
< 1900800 MHZ_TO_MBPS(1555, 4) >;
};
ddr5-map {
qcom,core-dev-table =
< 691200 MHZ_TO_MBPS( 451, 4) >,
< 1228800 MHZ_TO_MBPS( 547, 4) >,
< 1516800 MHZ_TO_MBPS( 768, 4) >,
< 1651200 MHZ_TO_MBPS(1555, 4) >,
< 1900800 MHZ_TO_MBPS(1708, 4) >;
};
};
qcom,cpu4-llcc-computemon {
qcom,core-dev-table =
< 1900800 MHZ_TO_MBPS( 150, 16) >;
};
qcom,cpu4-qoslatmon {
/delete-property/ qcom,cpulist;
qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>;
};
/delete-node/ qcom,cpu7-qoslatmon;
/delete-node/ qcom,cpu7-l3-computemon;
/delete-node/ qcom,cpu7-computemon;
};
qcom,cpu4_grp {
/delete-property/ qcom,cpulist;
qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>;
qcom,cpu4-rimps-l3-latmon {
/delete-property/ qcom,cpulist;
qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>;
qcom,core-dev-table =
< 940800 556800000 >,
< 1228800 768000000 >,
< 1651200 1190400000 >,
< 1900800 1401600000 >;
};
};
/delete-node/ qcom,cpu7-cpu-ddr-latfloor;
/delete-node/ qcom,cpu7-cpu-l3-latfloor;
/delete-node/ qcom,cpu7-cpu-ddr-qoslatfloor;
/delete-node/ qcom,cpu7_grp;
};

View file

@ -0,0 +1,22 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/interconnect/qcom,yupik.h>
#include "katmai-hsp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Katmai FP2 IoT HSP";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,msm-id = <497 0x10000>, <575 0x10000>, <576 0x10000>;
qcom,board-id = <34 1>;
qcom,softsku-id = <2>;
};
&pcie1 {
status = "okay";
};
&pcie1_msi {
status = "okay";
};

View file

@ -0,0 +1,21 @@
/dts-v1/;
/plugin/;
#include "katmai-hsp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Katmai FP2 IOT HSP + PM7250B";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,msm-id = <497 0x10000>, <575 0x10000>, <576 0x10000>;
qcom,board-id = <34 1>;
qcom,softsku-id = <2>;
};
&pcie1 {
status = "okay";
};
&pcie1_msi {
status = "okay";
};

View file

@ -0,0 +1,9 @@
/dts-v1/;
#include "katmai-fp2.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAI-FP2 SoC";
compatible = "qcom,yupik-iot";
qcom,board-id = <0 0>;
};

View file

@ -0,0 +1,60 @@
#include "yupik-iot.dtsi"
#include "katmai-cpu-fp2.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAI-FP2 SoC";
compatible = "qcom,yupik-iot";
qcom,msm-id = <576 0x10000>;
qcom,softsku-id = <2>;
};
&msm_gpu {
/delete-property/qcom,gpu-speed-bin;
/delete-property/qcom,initial-pwrlevel;
/delete-node/qcom,gpu-pwrlevels;
/delete-node/qcom,gpu-pwrlevel-bins;
/* GPU power levels */
qcom,gpu-pwrlevels {
#address-cells = <1>;
#size-cells = <0>;
qcom,initial-pwrlevel = <0>;
compatible = "qcom,gpu-pwrlevels";
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <315000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
qcom,bus-freq-ddr7 = <3>;
qcom,bus-min-ddr7 = <2>;
qcom,bus-max-ddr7 = <9>;
qcom,bus-freq-ddr8 = <3>;
qcom,bus-min-ddr8 = <2>;
qcom,bus-max-ddr8 = <7>;
qcom,acd-level = <0x882F5FFD>;
};
};
};
&cam_csid2 {
status = "disabled";
};
&cam_vfe2 {
status = "disabled";
};
&mdss_dsi0 {
/delete-property/reg;
/delete-property/reg-names;
reg = <0xae94000 0x400>,
<0xaf08000 0x4>,
<0x0ae36000 0x300>,
<0xc00c6000 0x01000>;
reg-names = "dsi_ctrl", "disp_cc_base", "mdp_intf_base", "disp_conf";
};

View file

@ -0,0 +1,13 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/interconnect/qcom,yupik.h>
#include "katmai-hsp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Katmai IoT HSP";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,msm-id = <497 0x10000>, <575 0x10000>, <576 0x10000>;
qcom,board-id = <34 1>;
qcom,softsku-id = <1>;
};

View file

@ -0,0 +1,12 @@
/dts-v1/;
/plugin/;
#include "katmai-hsp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Katmai IOT HSP + PM7250B";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,msm-id = <497 0x10000>, <575 0x10000>, <576 0x10000>;
qcom,board-id = <34 1>;
qcom,softsku-id = <1>;
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "katmai.dtsi"
#include "yupik-iot-hsp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Katmai HSP + PM7250B";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,board-id = <34 1>;
};

View file

@ -0,0 +1,10 @@
#include "yupik-iot-hsp-pm7250b.dtsi"
&pcie1 {
status = "disabled";
};
&pcie1_msi {
status = "disabled";
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "katmai.dtsi"
#include "yupik-iot-hsp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Katmai HSP";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,board-id = <34 1>;
};

View file

@ -0,0 +1,9 @@
#include "yupik-iot-hsp.dtsi"
&pcie1 {
status = "disabled";
};
&pcie1_msi {
status = "disabled";
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "katmai.dtsi"
#include "yupik-iot-idp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Katmai IDP + PM7250B";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,board-id = <34 0>;
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "katmai.dtsi"
#include "yupik-iot-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAI IDP";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,board-id = <34 0>;
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "katmai.dtsi"
#include "yupik-iot-idps-amoled.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAI IDPS + AMOLED";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,board-id = <34 2>;
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "katmai.dtsi"
#include "yupik-iot-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAI QRD";
compatible = "qcom,yupik-iot-qrd", "qcom,yupik-iot", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
};

View file

@ -0,0 +1,9 @@
/dts-v1/;
#include "katmai.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAI SoC";
compatible = "qcom,yupik-iot";
qcom,board-id = <0 0>;
};

View file

@ -0,0 +1,60 @@
#include "yupik-iot.dtsi"
#include "katmai-cpu-fp2.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAI SoC";
compatible = "qcom,yupik-iot";
qcom,msm-id = <576 0x10000>;
qcom,softsku-id = <1>;
};
&msm_gpu {
/delete-property/qcom,gpu-speed-bin;
/delete-property/qcom,initial-pwrlevel;
/delete-node/qcom,gpu-pwrlevels;
/delete-node/qcom,gpu-pwrlevel-bins;
/* GPU power levels */
qcom,gpu-pwrlevels {
#address-cells = <1>;
#size-cells = <0>;
qcom,initial-pwrlevel = <0>;
compatible = "qcom,gpu-pwrlevels";
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <315000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
qcom,bus-freq-ddr7 = <3>;
qcom,bus-min-ddr7 = <2>;
qcom,bus-max-ddr7 = <9>;
qcom,bus-freq-ddr8 = <3>;
qcom,bus-min-ddr8 = <2>;
qcom,bus-max-ddr8 = <7>;
qcom,acd-level = <0x882F5FFD>;
};
};
};
&cam_csid2 {
status = "disabled";
};
&cam_vfe2 {
status = "disabled";
};
&mdss_dsi0 {
/delete-property/reg;
/delete-property/reg-names;
reg = <0xae94000 0x400>,
<0xaf08000 0x4>,
<0x0ae36000 0x300>,
<0xc00c6000 0x01000>;
reg-names = "dsi_ctrl", "disp_cc_base", "mdp_intf_base", "disp_conf";
};

View file

@ -0,0 +1,22 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/interconnect/qcom,yupik.h>
#include "katmaip-hsp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KatmaiP FP2 IoT HSP";
compatible = "qcom,yupikp-iot-idp", "qcom,yupikp-iot", "qcom,idp";
qcom,msm-id = <498 0x10000>, <575 0x10000>, <576 0x10000>;
qcom,board-id = <34 1>;
qcom,softsku-id = <2>;
};
&pcie1 {
status = "okay";
};
&pcie1_msi {
status = "okay";
};

View file

@ -0,0 +1,21 @@
/dts-v1/;
/plugin/;
#include "katmaip-hsp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KatmaiP FP2 IOT HSP + PM7250B";
compatible = "qcom,yupikp-iot-idp", "qcom,yupikp-iot", "qcom,idp";
qcom,msm-id = <498 0x10000>, <575 0x10000>, <576 0x10000>;
qcom,board-id = <34 1>;
qcom,softsku-id = <2>;
};
&pcie1 {
status = "okay";
};
&pcie1_msi {
status = "okay";
};

View file

@ -0,0 +1,9 @@
/dts-v1/;
#include "katmaip-fp2.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAIP-FP2 SoC";
compatible = "qcom,yupikp-iot";
qcom,board-id = <0 0>;
};

View file

@ -0,0 +1,26 @@
#include "katmai-fp2.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAIP-FP2 SoC";
compatible = "qcom,yupikp-iot";
qcom,msm-id = <575 0x10000>;
qcom,softsku-id = <2>;
};
&soc {
qcom,rmnet-ipa {
status = "disabled";
};
};
&ipa_hw {
status = "disabled";
};
&cam_csid2 {
status = "disabled";
};
&cam_vfe2 {
status = "disabled";
};

View file

@ -0,0 +1,13 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/interconnect/qcom,yupik.h>
#include "katmaip-hsp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KatmaiP IoT HSP";
compatible = "qcom,yupikp-iot-idp", "qcom,yupikp-iot", "qcom,idp";
qcom,msm-id = <498 0x10000>, <575 0x10000>, <576 0x10000>;
qcom,board-id = <34 1>;
qcom,softsku-id = <1>;
};

View file

@ -0,0 +1,12 @@
/dts-v1/;
/plugin/;
#include "katmaip-hsp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KatmaiP IOT HSP + PM7250B";
compatible = "qcom,yupikp-iot-idp", "qcom,yupikp-iot", "qcom,idp";
qcom,msm-id = <498 0x10000>, <575 0x10000>, <576 0x10000>;
qcom,board-id = <34 1>;
qcom,softsku-id = <1>;
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "katmaip.dtsi"
#include "yupikp-iot-hsp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KatmaiP HSP + PM7250B";
compatible = "qcom,yupikp-iot-idp", "qcom,yupikp-iot", "qcom,idp";
qcom,board-id = <34 1>;
};

View file

@ -0,0 +1,9 @@
#include "yupikp-iot-hsp-pm7250b.dtsi"
&pcie1 {
status = "disabled";
};
&pcie1_msi {
status = "disabled";
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "katmaip.dtsi"
#include "yupikp-iot-hsp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KatmaiP HSP";
compatible = "qcom,yupikp-iot-idp", "qcom,yupikp-iot", "qcom,idp";
qcom,board-id = <34 1>;
};

View file

@ -0,0 +1,9 @@
#include "yupikp-iot-hsp.dtsi"
&pcie1 {
status = "disabled";
};
&pcie1_msi {
status = "disabled";
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "katmaip.dtsi"
#include "yupikp-iot-idp-pm7250b.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KatmaiP IDP + PM7250B";
compatible = "qcom,yupikp-iot-idp", "qcom,yupikp-iot", "qcom,idp";
qcom,board-id = <34 0>;
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "katmaip.dtsi"
#include "yupikp-idp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAIP IDP";
compatible = "qcom,yupikp-iot-idp", "qcom,yupikp-iot", "qcom,idp";
qcom,board-id = <34 0>;
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "katmaip.dtsi"
#include "yupikp-iot-idps-amoled.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAIP IDPS + AMOLED";
compatible = "qcom,yupikp-iot-idp", "qcom,yupikp-iot", "qcom,idp";
qcom,board-id = <34 2>;
};

View file

@ -0,0 +1,10 @@
/dts-v1/;
#include "katmaip.dtsi"
#include "yupikp-iot-qrd.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAIP QRD";
compatible = "qcom,yupikp-iot-qrd", "qcom,yupikp-iot", "qcom,qrd";
qcom,board-id = <0x1000B 0>;
};

View file

@ -0,0 +1,9 @@
/dts-v1/;
#include "katmaip.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAIP SoC";
compatible = "qcom,yupikp-iot";
qcom,board-id = <0 0>;
};

View file

@ -0,0 +1,26 @@
#include "katmai.dtsi"
/ {
model = "Qualcomm Technologies, Inc. KATMAIP SoC";
compatible = "qcom,yupikp-iot";
qcom,msm-id = <575 0x10000>;
qcom,softsku-id = <1>;
};
&cam_csid2 {
status = "disabled";
};
&cam_vfe2 {
status = "disabled";
};
&soc {
qcom,rmnet-ipa {
status = "disabled";
};
};
&ipa_hw {
status = "disabled";
};

View file

@ -171,8 +171,9 @@
qcom,cpu-voltage-cdev {
compatible = "qcom,cc-cooling-devices";
apc1_cluster: qcom,apc1-cluster {
qcom,cpus = <&CPU4 &CPU7>;
apc1_cluster: thermal-cluster-4-7 {
qcom,cluster0 = <&CPU4 &CPU5 &CPU6>;
qcom,cluster1 = <&CPU7>;
#cooling-cells = <2>;
};
};

View file

@ -899,5 +899,140 @@
qcom,acd-level = <0x882f5ffd>;
};
};
qcom,gpu-pwrlevels-5 {
#address-cells = <1>;
#size-cells = <0>;
qcom,speed-bin = <4>;
qcom,initial-pwrlevel = <7>;
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <738000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
qcom,bus-freq-ddr7 = <11>;
qcom,bus-min-ddr7 = <11>;
qcom,bus-max-ddr7 = <11>;
qcom,bus-freq-ddr8 = <11>;
qcom,bus-min-ddr8 = <11>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0xa82a5ffd>;
};
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <676000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,bus-freq-ddr7 = <11>;
qcom,bus-min-ddr7 = <11>;
qcom,bus-max-ddr7 = <11>;
qcom,bus-freq-ddr8 = <10>;
qcom,bus-min-ddr8 = <10>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0x882b5ffd>;
};
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <608000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
qcom,bus-freq-ddr7 = <8>;
qcom,bus-min-ddr7 = <7>;
qcom,bus-max-ddr7 = <11>;
qcom,bus-freq-ddr8 = <7>;
qcom,bus-min-ddr8 = <7>;
qcom,bus-max-ddr8 = <11>;
qcom,acd-level = <0xa82b5ffd>;
};
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <540000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
qcom,bus-freq-ddr7 = <8>;
qcom,bus-min-ddr7 = <7>;
qcom,bus-max-ddr7 = <10>;
qcom,bus-freq-ddr8 = <7>;
qcom,bus-min-ddr8 = <7>;
qcom,bus-max-ddr8 = <9>;
qcom,acd-level = <0xa82c5ffd>;
};
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <491000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
qcom,bus-freq-ddr7 = <8>;
qcom,bus-min-ddr7 = <6>;
qcom,bus-max-ddr7 = <10>;
qcom,bus-freq-ddr8 = <7>;
qcom,bus-min-ddr8 = <5>;
qcom,bus-max-ddr8 = <7>;
qcom,acd-level = <0xa82c5ffd>;
};
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <443000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
qcom,bus-freq-ddr7 = <8>;
qcom,bus-min-ddr7 = <6>;
qcom,bus-max-ddr7 = <10>;
qcom,bus-freq-ddr8 = <7>;
qcom,bus-min-ddr8 = <5>;
qcom,bus-max-ddr8 = <7>;
qcom,acd-level = <0xa82d5ffd>;
};
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-freq = <379000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
qcom,bus-freq-ddr7 = <8>;
qcom,bus-min-ddr7 = <6>;
qcom,bus-max-ddr7 = <10>;
qcom,bus-freq-ddr8 = <6>;
qcom,bus-min-ddr8 = <5>;
qcom,bus-max-ddr8 = <7>;
qcom,acd-level = <0x882e5ffd>;
};
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-freq = <315000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
qcom,bus-freq-ddr7 = <2>;
qcom,bus-min-ddr7 = <2>;
qcom,bus-max-ddr7 = <9>;
qcom,bus-freq-ddr8 = <2>;
qcom,bus-min-ddr8 = <2>;
qcom,bus-max-ddr8 = <7>;
qcom,acd-level = <0x882f5ffd>;
};
};
};
};

View file

@ -32,7 +32,7 @@
interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr";
qcom,icc-path-count = <2>;
qcom,bus-bw-cfg-count = <7>;
qcom,bus-bw-cfg-count = <9>;
qcom,bus-bw-cfg =
/** ICC Path 1 **/
<0 0>, /* no vote */
@ -46,6 +46,10 @@
<100000 790000>,
/* very high: > 1080 Mbps snoc/anoc: 403 Mhz ddr: 451.2 MHz */
<175000 1600000>,
/* Ultra high */
<0 0>,
/* Super High */
<0 0>,
/* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz
* ddr: 547.2 MHz
*/
@ -58,6 +62,8 @@
<30000 1804800>,
<100000 1804800>,
<175000 6220800>,
<0 0>,
<0 0>,
<7500 2188800>;
mhi,max-channels = <30>;

View file

@ -16,7 +16,7 @@
&soc {
wlan: qcom,cnss-qca6490@b0000000 {
compatible = "qcom,cnss-qca6490";
reg = <0xb0000000 0x10000>,
reg = <0xc0000000 0x10000>,
<0xb2e5510 0x690>;
reg-names = "smmu_iova_ipa", "tcs_cmd";
wlan-en-gpio = <&tlmm 91 0>;
@ -197,7 +197,7 @@
#size-cells = <1>;
cnss_pci_iommu_group: cnss_pci_iommu_group {
qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
qcom,iommu-dma-addr-pool = <0xa0000000 0x20000000>;
qcom,iommu-dma = "fastmap";
qcom,iommu-faults = "stall-disable", "HUPCF", "no-CFRE",
"non-fatal";

View file

@ -147,6 +147,7 @@
arm,buffer-size = <0x400000>;
arm,scatter-gather;
qcom,sw-usb;
qcom,qdss-ipa-support;
ipa-conn-data-base-pa = <0x1468B000>;

View file

@ -2,6 +2,8 @@
&pcie0 {
qcom,boot-option = <0x1>;
qcom,bdf-halt-dis;
qcom,wr-halt-size = <0x1e>;
};
&pcie0_bus2_dev2_fn0 {

View file

@ -12,3 +12,7 @@
"qcom,sdxlemur", "qcom,mtp";
qcom,board-id = <0x9010008 0x309>;
};
&ipa_hw {
qcom,scaling-exceptions = "wdi", "1400", "4800", "10000";
};

View file

@ -22,6 +22,8 @@
qcom,no-l1-supported;
qcom,no-l1ss-supported;
qcom,no-aux-clk-sync;
qcom,bdf-halt-dis;
qcom,wr-halt-size = <0x1e>;
};
&pcie0_bus2_dev1_fn0 {
@ -37,6 +39,7 @@
};
&pcie_i2c_ctrl {
ep_reset_postlinkup;
reg_update = <0x82c030 0x1
0x828000 0x3
0x82bd00 0x8
@ -53,6 +56,8 @@
};
&wifi0 {
/* QCN9000 6G */
board_id = <0xa4>;
status = "ok"
};

View file

@ -12,3 +12,9 @@
"qcom,sdxlemur", "qcom,mtp";
qcom,board-id = <0xA010008 0x30A>;
};
&ipa_hw {
qcom,use-dual-pine-config;
qcom,scaling-exceptions = "wdi", "1400", "4800", "10000", "wdi1", "1400", "4800", "10000";
};

View file

@ -17,6 +17,7 @@
};
&pcie_i2c_ctrl {
ep_reset_postlinkup;
reg_update = <0x82c030 0x1
0x828000 0x3
0x82bd00 0x8
@ -37,6 +38,9 @@
qcom,no-l1-supported;
qcom,no-l1ss-supported;
qcom,no-aux-clk-sync;
qcom,bdf-halt-dis;
qcom,wr-halt-size = <0x1e>;
};
&pcie0_bus2_dev1_fn0 {
@ -64,11 +68,13 @@
};
&wifi0 {
/* QCN9000 5G with SBS filter */
status = "ok"
board_id = <0xa0>;
board_id = <0xa3>;
};
&wifi1 {
/* QCN9000 2G */
status = "ok"
board_id = <0xa1>;
};

View file

@ -91,6 +91,7 @@
gpio-config-reg = <0x801208>;
ep-reset-reg = <0x801210>;
ep-reset-gpio-mask = <0xc>;
version-reg = <0x800000>;
dump-regs = <0x801330 0x801350 0x801370>;
reg_update = <0x82c030 0x1
0x828000 0x3
@ -104,9 +105,14 @@
0x82c01c 0x10
0x82c030 0xf
0x828000 0xf
0x82b268 0x2
0x82C02C 0x4
0x8249DC 0x0>;
0x82b268 0x2>;
/*FOM for preset caluclation*/
switch_reg_update = <0x82c02c 0x00000007
0x824a10 0x00000001
0x82c030 0x00000008
0x828000 0x00000001
0x82b074 0x00000020
0x82b2bc 0x00000001>;
};
};

View file

@ -40,7 +40,7 @@
ioss_r8125_eth0_tx: r8125_tx@eth0 {
qcom,dir-tx;
qcom,ring-size = <1024>;
qcom,ring-size = <4096>;
qcom,buff-size = <2048>;
qcom,mod-count-min = <32>;

View file

@ -29,6 +29,8 @@
&pcie0 {
qcom,boot-option = <0x1>;
qcom,bdf-halt-dis;
qcom,wr-halt-size = <0x1e>;
};
&pm7250b_vadc {

View file

@ -39,7 +39,6 @@
qrtr_node_id = <0x20>;
qca,auto-restart;
tgt-mem-mode = <0x1>;
board_id = <0xa4>;
mhi,max-channels = <30>;
mhi,timeout = <10000>;
@ -163,7 +162,6 @@
qrtr_node_id = <0x21>;
qca,auto-restart;
tgt-mem-mode = <0x1>;
board_id = <0xa4>;
mhi,max-channels = <30>;
mhi,timeout = <10000>;

View file

@ -140,7 +140,9 @@
"mmw1",
"mmw2",
"mmw3",
"mmw_ific0";
"mmw_ific0",
"sdr0_pa",
"sdr1_pa";
};
};
};
@ -619,4 +621,44 @@
};
};
};
modem-sdr0-pa {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&qmi_sensor
(QMI_MODEM_INST_ID+QMI_SDR0_PA)>;
trips {
thermal-engine-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
thermal-hal-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
modem-sdr1-pa {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&qmi_sensor
(QMI_MODEM_INST_ID+QMI_SDR1_PA)>;
trips {
thermal-engine-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
thermal-hal-config0 {
temperature = <125000>;
hysteresis = <1000>;
type = "passive";
};
};
};
};

View file

@ -67,14 +67,14 @@
thermal-sensors = <&tsens0 3>;
trips {
mdmss0_config0: mdmss0-config0 {
temperature = <111000>;
temperature = <101000>;
hysteresis = <3000>;
type = "passive";
};
mdmss0_config1: mdmss0-config1 {
temperature = <115000>;
hysteresis = <2000>;
temperature = <105000>;
hysteresis = <3000>;
type = "passive";
};
};
@ -87,14 +87,14 @@
thermal-sensors = <&tsens0 4>;
trips {
mdmss1_config0: mdmss1-config0 {
temperature = <111000>;
temperature = <101000>;
hysteresis = <3000>;
type = "passive";
};
mdmss1_config1: mdmss1-config1 {
temperature = <115000>;
hysteresis = <2000>;
temperature = <105000>;
hysteresis = <3000>;
type = "passive";
};
};
@ -134,14 +134,14 @@
thermal-sensors = <&tsens0 5>;
trips {
mdmss2_config0: mdmss2-config0 {
temperature = <111000>;
temperature = <101000>;
hysteresis = <3000>;
type = "passive";
};
mdmss2_config1: mdmss2-config1 {
temperature = <115000>;
hysteresis = <2000>;
temperature = <105000>;
hysteresis = <3000>;
type = "passive";
};
};
@ -154,14 +154,14 @@
thermal-sensors = <&tsens0 6>;
trips {
mdmss3_config0: mdmss3-config0 {
temperature = <111000>;
temperature = <101000>;
hysteresis = <3000>;
type = "passive";
};
mdmss3_config1: mdmss3-config1 {
temperature = <115000>;
hysteresis = <2000>;
temperature = <105000>;
hysteresis = <3000>;
type = "passive";
};
};

View file

@ -3,7 +3,7 @@
#include "sdxlemur-v2.dtsi"
#include "sdxlemur-mtp-cpe.dtsi"
#include "sdxlemur-mtp-cpe-pine1x.dtsi"
#include "sdxlemur-1024mb.dtsi"
#include "sdxlemur-1024mb-cpe.dtsi"
#include "sdxlemur-bluetooth.dtsi"
/ {
@ -12,3 +12,7 @@
"qcom,sdxlemur", "qcom,mtp";
qcom,board-id = <0x9010008 0x309>;
};
&ipa_hw {
qcom,scaling-exceptions = "wdi", "1400", "4800", "10000";
};

View file

@ -0,0 +1,25 @@
/dts-v1/;
#include "sdxlemur-v2.dtsi"
#include "sdxlemur-mtp-cpe.dtsi"
#include "sdxlemur-mtp-cpe-pine2x.dtsi"
#include "sdxlemur-1024mb-cpe.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR MTP CPE 2x Pine V2 5+6 Configuration";
compatible = "qcom,sdxlemur-mtp",
"qcom,sdxlemur", "qcom,mtp";
qcom,board-id = <0x12010008 0x312>;
};
&wifi0 {
/* QCN9000 6G with SBS filter */
status = "ok"
board_id = <0xa4>;
};
&wifi1 {
/* QCN9000 5G */
status = "ok"
board_id = <0xa3>;
};

View file

@ -3,7 +3,7 @@
#include "sdxlemur-v2.dtsi"
#include "sdxlemur-mtp-cpe.dtsi"
#include "sdxlemur-mtp-cpe-pine2x.dtsi"
#include "sdxlemur-1024mb.dtsi"
#include "sdxlemur-1024mb-cpe.dtsi"
#include "sdxlemur-bluetooth.dtsi"
/ {
@ -12,3 +12,9 @@
"qcom,sdxlemur", "qcom,mtp";
qcom,board-id = <0xA010008 0x30A>;
};
&ipa_hw {
qcom,use-dual-pine-config;
qcom,scaling-exceptions = "wdi", "1400", "4800", "10000", "wdi1", "1400", "4800", "10000";
};

View file

@ -1229,19 +1229,19 @@
/* SVS2 */
qcom,svs2 =
<600000 0 600000 1900000 0 76800>;
<50000 0 600000 1900000 0 76800>;
/* SVS */
qcom,svs =
<1200000 0 1200000 2800000 0 150000>;
<1290000 0 2160000 3000000 0 150000>;
/* NOMINAL */
qcom,nominal =
<2400000 0 2400000 5500000 0 400000>;
<2820000 0 4300000 6000000 0 400000>;
/* TURBO */
qcom,turbo =
<3600000 0 3600000 5500000 0 400000>;
<3480000 0 6900000 9600000 0 400000>;
qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL",
"TURBO";

View file

@ -199,8 +199,9 @@
qcom,cpu-voltage-cdev {
compatible = "qcom,cc-cooling-devices";
apc1_cluster: qcom,apc1-cluster {
qcom,cpus = <&CPU4 &CPU7>;
apc1_cluster: thermal-cluster-4-7 {
qcom,cluster0 = <&CPU4 &CPU5 &CPU6>;
qcom,cluster1 = <&CPU7>;
#cooling-cells = <2>;
};
};

View file

@ -559,6 +559,94 @@
qcom,acd-level = <0x882F5FFD>;
};
};
qcom,gpu-pwrlevels-5 {
#address-cells = <1>;
#size-cells = <0>;
qcom,speed-bin = <148>;
qcom,initial-pwrlevel = <4>;
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <700000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,bus-freq-ddr7 = <11>;
qcom,bus-min-ddr7 = <10>;
qcom,bus-max-ddr7 = <11>;
qcom,bus-freq-ddr8 = <9>;
qcom,bus-min-ddr8 = <8>;
qcom,bus-max-ddr8 = <10>;
qcom,acd-level = <0x802B5FFD>;
};
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <608000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
qcom,bus-freq-ddr7 = <10>;
qcom,bus-min-ddr7 = <9>;
qcom,bus-max-ddr7 = <11>;
qcom,bus-freq-ddr8 = <8>;
qcom,bus-min-ddr8 = <7>;
qcom,bus-max-ddr8 = <10>;
qcom,acd-level = <0x802B5FFD>;
};
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <550000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
qcom,bus-freq-ddr7 = <9>;
qcom,bus-min-ddr7 = <8>;
qcom,bus-max-ddr7 = <11>;
qcom,bus-freq-ddr8 = <7>;
qcom,bus-min-ddr8 = <6>;
qcom,bus-max-ddr8 = <9>;
qcom,acd-level = <0x802B5FFD>;
};
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <450000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
qcom,bus-freq-ddr7 = <6>;
qcom,bus-min-ddr7 = <5>;
qcom,bus-max-ddr7 = <10>;
qcom,bus-freq-ddr8 = <6>;
qcom,bus-min-ddr8 = <6>;
qcom,bus-max-ddr8 = <8>;
qcom,acd-level = <0x802B5FFD>;
};
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <315000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
qcom,bus-freq-ddr7 = <3>;
qcom,bus-min-ddr7 = <2>;
qcom,bus-max-ddr7 = <9>;
qcom,bus-freq-ddr8 = <3>;
qcom,bus-min-ddr8 = <2>;
qcom,bus-max-ddr8 = <7>;
qcom,acd-level = <0x882F5FFD>;
};
};
};
};

View file

@ -144,6 +144,14 @@
qcom,pre-scaling = <1 1>;
};
pm7325b_batt_therm {
reg = <PM7325B_ADC7_V_I_BAT_THERM>;
label = "pm7325b_batt_therm";
qcom,ratiometric;
qcom,hw-settle-time = <200>;
qcom,pre-scaling = <1 1>;
};
pm7325b_chg_temp {
reg = <PM7325B_ADC7_CHG_TEMP>;
label = "pm7325b_chg_temp";

View file

@ -7,6 +7,6 @@
/ {
model = "Qualcomm Technologies, Inc. Yupik IoT HSP";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,msm-id = <497 0x10000>;
qcom,msm-id = <497 0x10000>, <575 0x10000>, <576 0x10000>;
qcom,board-id = <34 1>;
};

View file

@ -6,6 +6,6 @@
/ {
model = "Qualcomm Technologies, Inc. Yupik IOT HSP + PM7250B";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,msm-id = <497 0x10000>;
qcom,msm-id = <497 0x10000>, <575 0x10000>, <576 0x10000>;
qcom,board-id = <34 1>;
};

View file

@ -7,6 +7,6 @@
/ {
model = "Qualcomm Technologies, Inc. YUPIK-IOT IDP";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,msm-id = <497 0x10000>;
qcom,msm-id = <497 0x10000>, <575 0x10000>, <576 0x10000>;
qcom,board-id = <34 0>;
};

View file

@ -6,6 +6,6 @@
/ {
model = "Qualcomm Technologies, Inc. Yupik IOT IDP + PM7250B";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,msm-id = <497 0x10000>;
qcom,msm-id = <497 0x10000>, <575 0x10000>, <576 0x10000>;
qcom,board-id = <34 0>;
};

View file

@ -6,6 +6,6 @@
/ {
model = "Qualcomm Technologies, Inc. YUPIK-IOT IDPS + AMOLED";
compatible = "qcom,yupik-iot-idp", "qcom,yupik-iot", "qcom,idp";
qcom,msm-id = <497 0x10000>;
qcom,msm-id = <497 0x10000>, <575 0x10000>, <576 0x10000>;
qcom,board-id = <34 2>;
};

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