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ARM: dts: msm: Add qcom,no-accumulative-counter property for cpufreq
Accumulative cycle counters are not supported, cycle counter needs to be read from the core-0 of the frequency domain. Add property to indicate the same. Change-Id: I503c4470824d29ee95a3c39a172ec716be77c61b
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3 changed files with 3 additions and 1 deletions
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@ -1331,6 +1331,7 @@
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reg-names = "freq-domain0", "freq-domain1";
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clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
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clock-names = "xo", "alternate";
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qcom,no-accumulative-counter;
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#freq-domain-cells = <2>;
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};
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@ -1360,6 +1360,7 @@
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reg-names = "freq-domain0", "freq-domain1";
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clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
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clock-names = "xo", "alternate";
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qcom,no-accumulative-counter;
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#freq-domain-cells = <2>;
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};
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@ -1068,7 +1068,7 @@
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clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
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clock-names = "xo", "alternate";
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qcom,no-accumulative-counter;
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#freq-domain-cells = <2>;
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};
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