ARM: dts: msm: Add qcom,no-accumulative-counter property for cpufreq

Accumulative cycle counters are not supported, cycle counter needs
to be read from the core-0 of the frequency domain.
Add property to indicate the same.

Change-Id: I503c4470824d29ee95a3c39a172ec716be77c61b
This commit is contained in:
Veera Vegivada 2021-02-23 18:17:49 +05:30
commit 9d50a8c24e
3 changed files with 3 additions and 1 deletions

View file

@ -1331,6 +1331,7 @@
reg-names = "freq-domain0", "freq-domain1";
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
clock-names = "xo", "alternate";
qcom,no-accumulative-counter;
#freq-domain-cells = <2>;
};

View file

@ -1360,6 +1360,7 @@
reg-names = "freq-domain0", "freq-domain1";
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
clock-names = "xo", "alternate";
qcom,no-accumulative-counter;
#freq-domain-cells = <2>;
};

View file

@ -1068,7 +1068,7 @@
clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
clock-names = "xo", "alternate";
qcom,no-accumulative-counter;
#freq-domain-cells = <2>;
};