A-Team_Digital_Solutions/android_kernel_motorola_sm6375
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ARM: dts: msm: add MHI register space info for PCIe on SA8195

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Add MHI register space information for PCIe so feature such as
displaying ASPM stats is possible on SA8195.

Change-Id: I2633a8be063dd10fe5128ae51d532cd5969f3bc3
This commit is contained in:
Nitesh Gupta 2021-04-26 23:36:20 +05:30 • committed by Gerrit - the friendly Code Review server
commit a3df1c9115
1 changed files with 16 additions and 8 deletions
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24
qcom/sa8195p-pcie.dtsi
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@ -12,10 +12,12 @@
<0x60001000 0x1000>,
<0x60100000 0x100000>,
<0x60200000 0x100000>,
<0x60300000 0x3d00000>;
<0x60300000 0x3d00000>,
<0x01c03000 0x1000>;
reg-names = "parf", "phy", "dm_core", "elbi",
"iatu", "conf", "io", "bars";
"iatu", "conf", "io", "bars",
"mhi";
#address-cells = <3>;
#size-cells = <2>;
@ -282,10 +284,12 @@
<0x68100000 0x100000>,
<0x68200000 0x100000>,
<0x68300000 0x3d00000>,
<0x01fec004 0x4>;
<0x01fec004 0x4>,
<0x01c13000 0x1000>;
reg-names = "parf", "phy", "dm_core", "elbi",
"iatu", "conf", "io", "bars", "tcsr";
"iatu", "conf", "io", "bars", "tcsr",
"mhi";
#address-cells = <3>;
#size-cells = <2>;
@ -590,10 +594,12 @@
<0x70100000 0x100000>,
<0x70200000 0x100000>,
<0x70300000 0x3d00000>,
<0x01fec004 0x4>;
<0x01fec004 0x4>,
<0x01c1b000 0x1000>;
reg-names = "parf", "phy", "dm_core", "elbi",
"iatu", "conf", "io", "bars", "tcsr";
"iatu", "conf", "io", "bars", "tcsr",
"mhi";
#address-cells = <3>;
#size-cells = <2>;
@ -897,10 +903,12 @@
<0x40001000 0x1000>,
<0x40100000 0x100000>,
<0x40200000 0x100000>,
<0x40300000 0x1fd00000>;
<0x40300000 0x1fd00000>,
<0x01c0b000 0x1000>;
reg-names = "parf", "phy", "dm_core", "elbi",
"iatu", "conf", "io", "bars";
"iatu", "conf", "io", "bars",
"mhi";
#address-cells = <3>;
#size-cells = <2>;