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ARM: dts: msm: enable SDE RSC driver on shima
Enable sde rscc v4 driver on shima target Change-Id: Ib0d930dfc6837f53edbff41970035ec0165586ae
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parent
24f69624b7
commit
ac5193ab05
2 changed files with 1 additions and 17 deletions
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@ -138,7 +138,7 @@
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&mdss_mdp {
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connectors = <&smmu_sde_unsec &smmu_sde_sec &sde_wb &sde_dsi
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&sde_dsi1>;
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&sde_dsi1 &sde_rscc>;
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};
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&dsi_r66451_amoled_video {
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@ -147,7 +147,6 @@
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sde_rscc: qcom,sde_rscc {
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cell-index = <0>;
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compatible = "qcom,sde-rsc";
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status = "disabled";
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reg = <0xaf20000 0x4d68>,
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<0xaf30000 0x3fd4>;
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reg-names = "drv", "wrapper";
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@ -200,7 +199,6 @@
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clock-names = "gcc_iface", "gcc_bus", "gcc_nrt_bus",
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"iface_clk", "core_clk", "vsync_clk",
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"lut_clk";
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vdd-supply = <&disp_cc_mdss_core_gdsc>;
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/* data and reg bus scale settings */
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interconnects = <&mmss_noc MASTER_MDP0 &mc_virt SLAVE_EBI1>,
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@ -213,20 +211,6 @@
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qcom,sde-dspp-ltm-version = <0x00010000>;
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/* offsets are based off dspp 0 and dspp 1 */
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qcom,sde-dspp-ltm-off = <0x2a000 0x28100>;
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qcom,platform-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,platform-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "vdd";
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qcom,supply-min-voltage = <0>;
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qcom,supply-max-voltage = <0>;
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qcom,supply-enable-load = <0>;
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qcom,supply-disable-load = <0>;
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};
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};
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};
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&mdss_dsi0 {
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