A-Team_Digital_Solutions/android_kernel_motorola_sm6375
Watch
2
0
Fork
You've already forked android_kernel_motorola_sm6375
 0
mirror of https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git synced 2026-10-08 21:22:09 -04:00
Code Issues Projects Releases Packages Wiki Activity

pinctrl: qcom: Fix msm_dirconn_uncfg_reg() to correctly set intr cfg

Browse source 
msm_dirconn_uncfg_reg() currently uses readl_/writel_relaxed() which do not
check for per tile address for gpio intr cfg. Replace to use
msm_readl/writel_intr_cfg() which takes care of per tile.

While at this also fix dir_conn_reg to use per tile gpio cfg.

Change-Id: If87e35f2943593c0723bd88a29d483fed70f7041
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
This commit is contained in:
Maulik Shah 2021-03-24 12:32:21 +05:30 • committed by Gerrit - the friendly Code Review server
commit b0e8e846ed
1 changed files with 4 additions and 3 deletions
Download patch file Download diff file Expand all files Collapse all files

7
drivers/pinctrl/qcom/pinctrl-msm.c
View file

@ -997,10 +997,11 @@ static void msm_dirconn_uncfg_reg(struct irq_data *d, u32 offset)
raw_spin_lock_irqsave(&pctrl->lock, flags);
g = &pctrl->soc->groups[d->hwirq];
writel_relaxed(val, pctrl->regs + g->dir_conn_reg + (offset * 4));
val = readl_relaxed(pctrl->regs + g->intr_cfg_reg);
writel_relaxed(val, pctrl->regs[g->tile] + g->dir_conn_reg
+ (offset * 4));
val = msm_readl_intr_cfg(pctrl, g);
val &= ~BIT(g->dir_conn_en_bit);
writel_relaxed(val, pctrl->regs + g->intr_cfg_reg);
msm_writel_intr_cfg(val, pctrl, g);
raw_spin_unlock_irqrestore(&pctrl->lock, flags);
}