Merge "ARM: dts: msm: Add AOPCC for SM6150"

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qctecmdr 2021-02-03 12:02:58 -08:00 • committed by Gerrit - the friendly Code Review server
commit b50fb80cfd

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@ -1,5 +1,6 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,aop-qmp.h>
#include <dt-bindings/clock/qcom,camcc-sm6150.h>
#include <dt-bindings/clock/qcom,dispcc-sm6150.h>
#include <dt-bindings/clock/qcom,gpucc-sm6150.h>
@ -761,6 +762,13 @@
<CONTROL_TCS 0>;
};
aopcc: qcom,aopcc@0 {
compatible = "qcom,aop-qmp-clk";
mboxes = <&qmp_aop 0>;
mbox-names = "qdss_clk";
#clock-cells = <1>;
};
gcc: clock-controller@100000 {
compatible = "qcom,sm6150-gcc", "syscon";
reg = <0x100000 0x1f0000>;