mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-15 01:01:56 -04:00
qcacmn: Don't use war_pci_write32
The regular path is the only path used. The work arround code path is never accessed because the conditional variable is allways left to 0. Change-Id: I9af8fd38c6fbbfc9304bbffb6e1ae78cea34c6a0 CRs-Fixed: 986480
This commit is contained in:
parent
eadcb4a234
commit
b72c03c8f7
2 changed files with 1 additions and 33 deletions
|
|
@ -221,12 +221,10 @@ extern void hif_target_write_checked(struct hif_softc *scn, uint32_t offset,
|
|||
#define A_TARGET_WRITE(scn, offset, value) \
|
||||
hif_target_write_checked(scn, (offset), (value))
|
||||
#else /* CONFIG_ATH_PCIE_ACCESS_DEBUG */
|
||||
void war_pci_write32(char *addr, u32 offset, u32 value);
|
||||
|
||||
#define A_TARGET_READ(scn, offset) \
|
||||
hif_read32_mb(scn->mem + (offset))
|
||||
#define A_TARGET_WRITE(scn, offset, value) \
|
||||
war_pci_write32(scn->mem, (offset), (value))
|
||||
hif_write32_mb((scn->mem) + (offset), value);
|
||||
#endif
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -81,8 +81,6 @@
|
|||
unsigned int msienable = 0;
|
||||
module_param(msienable, int, 0644);
|
||||
|
||||
int hif_pci_war1 = 0;
|
||||
static DEFINE_SPINLOCK(pciwar_lock);
|
||||
|
||||
#ifndef REMOVE_PKT_LOG
|
||||
struct ol_pl_os_dep_funcs *g_ol_pl_os_dep_funcs = NULL;
|
||||
|
|
@ -3078,34 +3076,6 @@ void hif_target_dump_access_log(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* war_pci_write32() - PCIe io32 write workaround
|
||||
* @addr: addr
|
||||
* @offset: offset
|
||||
* @value: value
|
||||
*
|
||||
* iowrite32
|
||||
*
|
||||
* Return: int
|
||||
*/
|
||||
void war_pci_write32(char *addr, uint32_t offset, uint32_t value)
|
||||
{
|
||||
if (hif_pci_war1) {
|
||||
unsigned long irq_flags;
|
||||
|
||||
spin_lock_irqsave(&pciwar_lock, irq_flags);
|
||||
|
||||
(void)ioread32((void __iomem *)(addr + offset + 4));
|
||||
(void)ioread32((void __iomem *)(addr + offset + 4));
|
||||
(void)ioread32((void __iomem *)(addr + offset + 4));
|
||||
iowrite32((uint32_t) (value), (void __iomem *)(addr + offset));
|
||||
|
||||
spin_unlock_irqrestore(&pciwar_lock, irq_flags);
|
||||
} else {
|
||||
iowrite32((uint32_t) (value), (void __iomem *)(addr + offset));
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* hif_configure_irq(): configure interrupt
|
||||
*
|
||||
|
|
|
|||
Loading…
Reference in a new issue