Merge "ARM: dts: msm: Add secondary controller USB nodes for Yupik"

This commit is contained in:
qctecmdr 2020-12-08 23:22:29 -08:00 • committed by Gerrit - the friendly Code Review server
commit b8fe049ad2
2 changed files with 87 additions and 1 deletions

View file

@ -28,6 +28,21 @@
0x0 0x4>;
};
usb_emu_phy_1: usb_emu_phy@8c0e000 {
compatible = "qcom,usb-emu-phy";
reg = <0x08c0e000 0x9500>;
qcom,emu-init-seq = <0xffff 0x4
0xfff0 0x4
0x100000 0x20
0x0 0x20
0x101f0 0x20
0x100000 0x3c
0x0 0x3c
0x10060 0x3c
0x0 0x4>;
};
bi_tcxo: bi_tcxo {
compatible = "fixed-factor-clock";
clock-mult = <1>;
@ -43,6 +58,7 @@
clocks = <&xo_board>;
#clock-cells = <0>;
};
};
&usb0 {
@ -54,6 +70,15 @@
};
};
&usb1 {
/delete-property/ extcon;
dwc3@8c00000 {
usb-phy = <&usb_emu_phy_1>, <&usb_nop_phy>;
maximum-speed = "high-speed";
dr_mode = "peripheral";
};
};
&sdhc_1 {
status = "disabled";

View file

@ -45,7 +45,7 @@
dwc3@a600000 {
compatible = "snps,dwc3";
reg = <0xa600000 0xcd00>;
reg = <0xa600000 0xe000>;
interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
linux,sysdev_is_parent;
snps,disable-clk-gating;
@ -62,6 +62,67 @@
};
};
usb1: hsusb@8c00000 {
status = "disabled";
compatible = "qcom,dwc-usb3-msm";
reg = <0x8c00000 0x100000>;
reg-names = "core_base";
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupts-extended = <&pdc 12 IRQ_TYPE_EDGE_RISING>,
<&intc GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
<&pdc 13 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "dp_hs_phy_irq", "pwr_event_irq",
"dm_hs_phy_irq";
qcom,use-pdc-interrupts;
USB3_GDSC-supply = <&gcc_usb30_sec_gdsc>;
clocks = <&gcc GCC_USB30_SEC_MASTER_CLK>,
<&gcc GCC_CFG_NOC_USB3_SEC_AXI_CLK>,
<&gcc GCC_AGGRE_USB3_SEC_AXI_CLK>,
<&gcc GCC_USB30_SEC_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_SEC_SLEEP_CLK>;
clock-names = "core_clk", "iface_clk","bus_aggr_clk",
"utmi_clk", "sleep_clk";
resets = <&gcc GCC_USB30_SEC_BCR>;
reset-names = "core_reset";
qcom,core-clk-rate = <120000000>;
qcom,core-clk-rate-hs = <66666667>;
qcom,num-gsi-evt-buffs = <0x3>;
qcom,gsi-reg-offset =
<0x0fc /* GSI_GENERAL_CFG */
0x110 /* GSI_DBL_ADDR_L */
0x120 /* GSI_DBL_ADDR_H */
0x130 /* GSI_RING_BASE_ADDR_L */
0x144 /* GSI_RING_BASE_ADDR_H */
0x1a4>; /* GSI_IF_STS */
qcom,dwc-usb3-msm-tx-fifo-size = <21288>;
dwc3@8c00000 {
compatible = "snps,dwc3";
reg = <0x8c00000 0xe000>;
interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
linux,sysdev_is_parent;
snps,disable-clk-gating;
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x0>;
snps,is-utmi-l1-suspend;
snps,dis-u1-entry-quirk;
snps,dis-u2-entry-quirk;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
tx-fifo-resize;
maximum-speed = "high-speed";
dr_mode = "otg";
};
};
usb_nop_phy: usb_nop_phy {
compatible = "usb-nop-xceiv";
};