mirror of
https://github.com/BobTheBlinker/android_kernel_motorola_sm6375.git
synced 2026-10-13 00:00:00 -04:00
Merge "ARM: dts: msm: Add spss device node for PIL on SDMSHRIKE"
This commit is contained in:
qctecmdr
Gerrit - the friendly Code Review server
commit
baa93b2596
3 changed files with 310 additions and 8 deletions
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@ -61,3 +61,26 @@
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&pil_modem {
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status = "disabled";
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};
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&soc {
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qcom,lpass@17300000 {
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status = "ok"
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qcom,pil-force-shutdown;
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};
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qcom,turing@8300000 {
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status = "ok"
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};
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qcom,venus@aae0000 {
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status = "ok"
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};
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qcom,spss@1880000 {
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status = "ok"
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};
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qcom,npu@9800000 {
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status = "ok"
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};
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};
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@ -503,6 +503,10 @@
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compatible = "simple-bus";
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};
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qcom-secure-buffer {
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compatible = "qcom,secure-buffer";
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};
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soc: soc { };
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};
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@ -665,6 +669,12 @@
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qcom,rtb-size = <0x100000>;
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};
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pil_scm_pas {
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compatible = "qcom,pil-tz-scm-pas";
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interconnects = <&aggre2_noc MASTER_CRYPTO
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&mc_virt SLAVE_EBI1>;
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};
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qcom,mpm2-sleep-counter@c221000 {
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compatible = "qcom,mpm2-sleep-counter";
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reg = <0xc221000 0x1000>;
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@ -1453,7 +1463,6 @@
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qcom,dll-hsr-list = <0x0007642c 0x0 0x10 0x2C010800 0x80040868>;
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qcom,devfreq,freq-table = <50000000 200000000>;
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status = "disabled";
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qos0 {
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@ -1467,6 +1476,145 @@
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};
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};
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qcom,lpass@17300000 {
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compatible = "qcom,pil-tz-generic";
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reg = <0x17300000 0x00100>;
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vdd_cx-supply = <&VDD_CX_LEVEL>;
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qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;
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qcom,proxy-reg-names = "vdd_cx";
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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qcom,proxy-clock-names = "xo";
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qcom,pas-id = <1>;
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qcom,proxy-timeout-ms = <10000>;
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qcom,smem-id = <423>;
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qcom,sysmon-id = <1>;
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qcom,ssctl-instance-id = <0x14>;
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qcom,firmware-name = "adsp";
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memory-region = <&pil_adsp_mem>;
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qcom,signal-aop;
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qcom,complete-ramdump;
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qcom,pil-force-shutdown;
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/* Inputs from lpass */
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interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
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<&adsp_smp2p_in 0 0>,
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<&adsp_smp2p_in 2 0>,
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<&adsp_smp2p_in 1 0>,
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<&adsp_smp2p_in 3 0>;
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interrupt-names = "qcom,wdog",
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"qcom,err-fatal",
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"qcom,proxy-unvote",
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"qcom,err-ready",
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"qcom,stop-ack";
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/* Outputs to lpass */
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qcom,smem-states = <&adsp_smp2p_out 0>;
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qcom,smem-state-names = "qcom,force-stop";
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mboxes = <&qmp_aop 0>;
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mbox-names = "adsp-pil";
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};
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qcom,turing@8300000 {
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compatible = "qcom,pil-tz-generic";
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reg = <0x8300000 0x100000>;
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vdd_cx-supply = <&VDD_CX_LEVEL>;
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qcom,proxy-reg-names = "vdd_cx";
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qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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qcom,proxy-clock-names = "xo";
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qcom,pas-id = <18>;
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qcom,proxy-timeout-ms = <10000>;
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qcom,smem-id = <601>;
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qcom,sysmon-id = <7>;
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qcom,ssctl-instance-id = <0x17>;
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qcom,firmware-name = "cdsp";
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memory-region = <&pil_cdsp_mem>;
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qcom,signal-aop;
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qcom,complete-ramdump;
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qcom,msm-bus,name = "pil-cdsp";
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qcom,msm-bus,num-cases = <2>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<154 10070 0 0>,
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<154 10070 0 1>;
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/* Inputs from turing */
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interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
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<&cdsp_smp2p_in 0 0>,
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<&cdsp_smp2p_in 2 0>,
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<&cdsp_smp2p_in 1 0>,
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<&cdsp_smp2p_in 3 0>;
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interrupt-names = "qcom,wdog",
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"qcom,err-fatal",
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"qcom,proxy-unvote",
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"qcom,err-ready",
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"qcom,stop-ack";
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/* Outputs to turing */
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qcom,smem-states = <&cdsp_smp2p_out 0>;
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qcom,smem-state-names = "qcom,force-stop";
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mboxes = <&qmp_aop 0>;
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mbox-names = "cdsp-pil";
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};
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qcom,npu@9800000 {
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compatible = "qcom,pil-tz-generic";
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reg = <0x9800000 0x800000>;
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status = "ok"
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qcom,pas-id = <23>;
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qcom,firmware-name = "npu";
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memory-region = <&pil_npu_mem>;
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};
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qcom,spss@1880000 {
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compatible = "qcom,pil-tz-generic";
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reg = <0x188101c 0x4>,
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<0x1881024 0x4>,
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<0x1881028 0x4>,
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<0x188103c 0x4>,
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<0x1882014 0x4>;
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reg-names = "sp2soc_irq_status", "sp2soc_irq_clr",
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"sp2soc_irq_mask", "rmb_err", "rmb_err_spare2";
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interrupts = <0 352 1>;
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vdd_cx-supply = <&VDD_CX_LEVEL>;
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qcom,proxy-reg-names = "vdd_cx";
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qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
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vdd_mx-supply = <&VDD_MX_LEVEL>;
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vdd_mx-uV = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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qcom,proxy-clock-names = "xo";
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qcom,pil-generic-irq-handler;
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status = "ok"
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qcom,signal-aop;
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qcom,complete-ramdump;
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qcom,pas-id = <14>;
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qcom,proxy-timeout-ms = <10000>;
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qcom,firmware-name = "spss";
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memory-region = <&pil_spss_mem>;
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qcom,spss-scsr-bits = <24 25>;
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mboxes = <&qmp_aop 0>;
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mbox-names = "spss-pil";
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};
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};
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#include "sdmshrike-pinctrl.dtsi"
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@ -1481,6 +1629,12 @@
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#include "sa8195-ssc-qupv3.dtsi"
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#include "sa8195-usb.dtsi"
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&firmware {
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scm {
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compatible = "qcom,scm";
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};
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};
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&emac_gdsc {
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status = "ok"
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};
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139
qcom/sm8150.dtsi
139
qcom/sm8150.dtsi
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@ -1712,7 +1712,7 @@
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qcom,complete-ramdump;
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/* Inputs from mss */
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interrupts-extended = <&pdc 0 266 1>,
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interrupts-extended = <&intc GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
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<&modem_smp2p_in 0 0>,
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<&modem_smp2p_in 2 0>,
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<&modem_smp2p_in 1 0>,
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@ -1740,7 +1740,9 @@
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vdd_cx-supply = <&VDD_CX_LEVEL>;
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qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;
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qcom,proxy-reg-names = "vdd_cx";
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vdd_mx-supply = <&VDD_MX_LEVEL>;
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qcom,vdd_mx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 0>;
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qcom,proxy-reg-names = "vdd_cx","vdd_mx";
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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@ -1755,20 +1757,21 @@
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memory-region = <&pil_adsp_mem>;
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qcom,signal-aop;
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qcom,complete-ramdump;
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qcom,pil-force-shutdown;
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/* Inputs from lpass */
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interrupts-extended = <&pdc 0 162 1>,
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interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
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<&adsp_smp2p_in 0 0>,
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<&adsp_smp2p_in 2 0>,
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<&adsp_smp2p_in 1 0>,
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<&adsp_smp2p_in 3 0>;
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<&adsp_smp2p_in 3 0>,
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<&adsp_smp2p_in 7 0>;
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interrupt-names = "qcom,wdog",
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"qcom,err-fatal",
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"qcom,proxy-unvote",
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"qcom,err-ready",
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"qcom,stop-ack";
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"qcom,stop-ack",
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"qcom,shutdown-ack";
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/* Outputs to lpass */
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qcom,smem-states = <&adsp_smp2p_out 0>;
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@ -1806,7 +1809,7 @@
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qcom,complete-ramdump;
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/* Inputs from ssc */
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interrupts-extended = <&pdc 0 494 1>,
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interrupts-extended = <&pdc 14 IRQ_TYPE_LEVEL_HIGH>,
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<&dsps_smp2p_in 0 0>,
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<&dsps_smp2p_in 2 0>,
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<&dsps_smp2p_in 1 0>,
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@ -1825,6 +1828,128 @@
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mboxes = <&qmp_aop 0>;
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mbox-names = "slpi-pil";
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};
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qcom,spss@1880000 {
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compatible = "qcom,pil-tz-generic";
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reg = <0x188101c 0x4>,
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<0x1881024 0x4>,
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<0x1881028 0x4>,
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<0x188103c 0x4>,
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<0x1882014 0x4>;
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reg-names = "sp2soc_irq_status", "sp2soc_irq_clr",
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"sp2soc_irq_mask", "rmb_err", "rmb_err_spare2";
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interrupts = <0 352 1>;
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vdd_cx-supply = <&VDD_CX_LEVEL>;
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qcom,proxy-reg-names = "vdd_cx";
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qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
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vdd_mx-supply = <&VDD_MX_LEVEL>;
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vdd_mx-uV = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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qcom,proxy-clock-names = "xo";
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qcom,pil-generic-irq-handler;
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status = "ok"
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qcom,signal-aop;
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qcom,complete-ramdump;
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qcom,pas-id = <14>;
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qcom,proxy-timeout-ms = <10000>;
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qcom,firmware-name = "spss";
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memory-region = <&pil_spss_mem>;
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qcom,spss-scsr-bits = <24 25>;
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mboxes = <&qmp_aop 0>;
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mbox-names = "spss-pil";
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};
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qcom,npu@9800000 {
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compatible = "qcom,pil-tz-generic";
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reg = <0x9800000 0x800000>;
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status = "ok"
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qcom,pas-id = <23>;
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qcom,firmware-name = "npu";
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memory-region = <&pil_npu_mem>;
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};
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qcom,turing@8300000 {
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compatible = "qcom,pil-tz-generic";
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reg = <0x8300000 0x100000>;
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vdd_cx-supply = <&VDD_CX_LEVEL>;
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qcom,proxy-reg-names = "vdd_cx";
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qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;
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clocks = <&rpmhcc RPMH_CXO_CLK>;
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clock-names = "xo";
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qcom,proxy-clock-names = "xo";
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qcom,pas-id = <18>;
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qcom,proxy-timeout-ms = <10000>;
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qcom,smem-id = <601>;
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qcom,sysmon-id = <7>;
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qcom,ssctl-instance-id = <0x17>;
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qcom,firmware-name = "cdsp";
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memory-region = <&pil_cdsp_mem>;
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qcom,signal-aop;
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qcom,complete-ramdump;
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qcom,msm-bus,name = "pil-cdsp";
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qcom,msm-bus,num-cases = <2>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<154 10070 0 0>,
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<154 10070 0 1>;
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/* Inputs from turing */
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interrupts-extended = <&intc GIC_SPI 578 IRQ_TYPE_LEVEL_HIGH>,
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<&cdsp_smp2p_in 0 0>,
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<&cdsp_smp2p_in 2 0>,
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<&cdsp_smp2p_in 1 0>,
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<&cdsp_smp2p_in 3 0>;
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interrupt-names = "qcom,wdog",
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"qcom,err-fatal",
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"qcom,proxy-unvote",
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"qcom,err-ready",
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"qcom,stop-ack";
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/* Outputs to turing */
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qcom,smem-states = <&cdsp_smp2p_out 0>;
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qcom,smem-state-names = "qcom,force-stop";
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mboxes = <&qmp_aop 0>;
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mbox-names = "cdsp-pil";
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};
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qcom,venus@aae0000 {
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compatible = "qcom,pil-tz-generic";
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reg = <0xaae0000 0x4000>;
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vdd-supply = <&mvsc_gdsc>;
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qcom,proxy-reg-names = "vdd";
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qcom,complete-ramdump;
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clocks = <&videocc VIDEO_CC_XO_CLK>,
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<&videocc VIDEO_CC_MVSC_CORE_CLK>,
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<&videocc VIDEO_CC_IRIS_AHB_CLK>;
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clock-names = "xo", "core", "ahb";
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qcom,proxy-clock-names = "xo", "core", "ahb";
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qcom,core-freq = <200000000>;
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qcom,ahb-freq = <200000000>;
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qcom,pas-id = <9>;
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interconnect-names = "pil-venus";
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interconnects = <&mmss_noc MASTER_VIDEO_P0
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&mc_virt SLAVE_EBI1>;
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qcom,proxy-timeout-ms = <100>;
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qcom,firmware-name = "venus";
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memory-region = <&pil_video_mem>;
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};
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};
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&firmware {
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|
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