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Merge "ARM: dts: msm: update phandle for pcie_pipe_clk_ext_src for sdxlemur"
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@ -70,7 +70,7 @@
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<&gcc GCC_PCIE_SLEEP_CLK>,
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<&gcc GCC_PCIE_RCHNG_PHY_CLK>,
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<&gcc GCC_PCIE_PIPE_CLK_SRC>,
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<&gcc PCIE_PIPE_CLK>;
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<&pcie_pipe_clk>;
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clock-names = "pcie_0_pipe_clk", "pcie_0_ref_clk_src",
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"pcie_0_aux_clk", "pcie_0_cfg_ahb_clk",
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