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Merge "ARM: dts: msm: Update memory-map for sdxlemur"

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This commit is contained in:
qctecmdr 2020-10-19 19:06:16 -07:00 • committed by Gerrit - the friendly Code Review server
commit cab2b656b4
13 changed files with 72 additions and 43 deletions
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9
qcom/sdxlemur-1024mb.dtsi Normal file
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@ -0,0 +1,9 @@
#include "sdxlemur-512mb.dtsi"
&mpss_adsp_mem {
reg = <0x90800000 0x10000000>;
};
&access_control_mem {
reg = <0x8fd80000 0x80000>;
};

53
qcom/sdxlemur-512mb.dtsi Normal file
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@ -0,0 +1,53 @@
&reserved_memory {
mpss_adsp_mem: mpss_adsp_region@90800000 {
no-map;
reg = <0x90800000 0xF800000>;
};
tz_mem: tz_mem_region@8ff00000 {
no-map;
reg = <0x8ff00000 0x600000>;
};
cmd_db: reserved-memory@8fee0000 {
compatible = "qcom,cmd-db";
no-map;
reg = <0x8fee0000 0x20000>;
};
smem_mem: smem_region@8fe20000 {
no-map;
reg = <0x8fe20000 0xc0000>;
label = "smem_mem";
};
aop_mem: aop_regions@0x8fe00000 {
no-map;
reg = <0x8fe00000 0x20000>;
};
access_control_mem: access_control_region@8fd80000 {
no-map;
reg = <0x8fd80000 0x40000>;
};
hyp_mem: hyp_region@8fd00000 {
no-map;
reg = <0x8fd00000 0x80000>;
};
secdata_mem: secdata_region@0x8fcfd000 {
no-map;
reg = <0x8fcfd000 0x1000>;
};
ipa_fw_mem: ipa_fw_region@0x8fced000 {
no-map;
reg = <0x8fced000 0x10000>;
};
mpss_dsm: mpss_dsm_region@8c400000 {
no-map;
reg = <0x8c400000 0x3200000>;
};
};

2
qcom/sdxlemur-cdp.dts
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@ -2,7 +2,7 @@
#include "sdxlemur.dtsi"
#include "sdxlemur-cdp.dtsi"
#include "sdxlemur-1024mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR CDP";
compatible = "qcom,sdxlemur-cdp",

1
qcom/sdxlemur-mtp-cpe.dts
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@ -2,6 +2,7 @@
#include "sdxlemur.dtsi"
#include "sdxlemur-mtp-cpe.dtsi"
#include "sdxlemur-1024mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR MTP CPE";

1
qcom/sdxlemur-mtp-mbb-ntn3-pcie.dts
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@ -2,6 +2,7 @@
#include "sdxlemur.dtsi"
#include "sdxlemur-mtp-mbb-ntn3-pcie.dtsi"
#include "sdxlemur-1024mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR MTP MBB NTN3 PCIE";

1
qcom/sdxlemur-mtp-mbb-pcie-ep.dts
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@ -2,6 +2,7 @@
#include "sdxlemur.dtsi"
#include "sdxlemur-mtp-mbb-pcie-ep.dtsi"
#include "sdxlemur-512mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR MTP MBB PCIE-EP";

1
qcom/sdxlemur-mtp-mbb-pcie-rc-ep.dts
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@ -2,6 +2,7 @@
#include "sdxlemur.dtsi"
#include "sdxlemur-mtp-mbb-pcie-rc-ep.dtsi"
#include "sdxlemur-512mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR MTP MBB RC PCIE-EP";

1
qcom/sdxlemur-mtp-mbb.dts
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@ -2,6 +2,7 @@
#include "sdxlemur.dtsi"
#include "sdxlemur-mtp-mbb.dtsi"
#include "sdxlemur-1024mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR MTP MBB";

1
qcom/sdxlemur-mtp.dts
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@ -2,6 +2,7 @@
#include "sdxlemur.dtsi"
#include "sdxlemur-mtp.dtsi"
#include "sdxlemur-1024mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR MTP";

1
qcom/sdxlemur-rcm-pcie-ep.dts
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@ -2,6 +2,7 @@
#include "sdxlemur.dtsi"
#include "sdxlemur-rcm-pcie-ep.dtsi"
#include "sdxlemur-512mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR RCM PCIe-EP";

1
qcom/sdxlemur-rcm-rc.dts
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@ -2,6 +2,7 @@
#include "sdxlemur.dtsi"
#include "sdxlemur-rcm-rc.dtsi"
#include "sdxlemur-1024mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR RCM Root Complex";

1
qcom/sdxlemur-rumi.dts
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@ -2,6 +2,7 @@
#include "sdxlemur.dtsi"
#include "sdxlemur-rumi.dtsi"
#include "sdxlemur-1024mb.dtsi"
/ {
model = "Qualcomm Technologies, Inc. SDXLEMUR RUMI";

42
qcom/sdxlemur.dtsi
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@ -32,48 +32,6 @@
#size-cells = <1>;
ranges;
cmd_db: reserved-memory@8fee0000 {
compatible = "qcom,cmd-db";
no-map;
reg = <0x8fee0000 0x20000>;
};
mpss_adsp_mem: mpss_adsp_region@90800000 {
no-map;
reg = <0x90800000 0x10000000>;
};
tz_mem: tz_mem_region@8ff00000 {
no-map;
reg = <0x8ff00000 0x600000>;
};
smem_mem: smem_region@8fe40000 {
no-map;
reg = <0x8fe40000 0xc0000>;
label = "smem_mem";
};
peripheral_mem: peripheral_region@8fd00000 {
no-map;
reg = <0x8fd00000 0x140000>;
};
/*
* The exact size of this region may vary based on DDR size.
* 0x100000 will be valid for all DDR sizes at the cost of
* slightly reducing the memory available for HLOS.
*/
peripheral_mem2: peripheral_region2@8fb00000 {
no-map;
reg = <0x8fb00000 0x100000>;
};
mpss_dsm: mpss_dsm_region@8c400000 {
no-map;
reg = <0x8c400000 0x3200000>;
};
dump_mem: mem_dump_region {
compatible = "shared-dma-pool";
alloc-ranges = <0x00000000 0xffffffff>;